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XCF04SVOGG20C PDF预览

XCF04SVOGG20C

更新时间: 2024-01-05 20:50:03
品牌 Logo 应用领域
赛灵思 - XILINX 光电二极管内存集成电路
页数 文件大小 规格书
35页 1015K
描述
Configuration Memory, 4MX1, Serial, CMOS, PDSO20, LEAD-FREE, PLASTIC, TSSOP-20

XCF04SVOGG20C 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP,针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.45
其他特性:IT CAN ALSO OPERATES AT 2.5, 3.3 VOLT NOMINALJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:6.5024 mm
内存密度:4194304 bit内存集成电路类型:CONFIGURATION MEMORY
内存宽度:1湿度敏感等级:3
功能数量:1端子数量:20
字数:4194304 words字数代码:4000000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:4MX1
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:SERIAL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.19 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

XCF04SVOGG20C 数据手册

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35  
R
Platform Flash In-System Programmable  
Configuration PROMs  
DS123 (v2.18) May 19, 2010  
Product Specification  
Features  
In-System Programmable PROMs for Configuration of  
Xilinx® FPGAs  
XCF01S/XCF02S/XCF04S  
3.3V Supply Voltage  
Low-Power Advanced CMOS NOR Flash Process  
Endurance of 20,000 Program/Erase Cycles  
Serial FPGA Configuration Interface  
Available in Small-Footprint VO20 and VOG20  
Packages  
Operation over Full Industrial Temperature Range  
(–40°C to +85°C)  
XCF08P/XCF16P/XCF32P  
IEEE Standard 1149.1/1532 Boundary-Scan (JTAG)  
Support for Programming, Prototyping, and Testing  
1.8V Supply Voltage  
Serial or Parallel FPGA Configuration Interface  
JTAG Command Initiation of Standard FPGA  
Configuration  
Available in Small-Footprint VOG48, FS48, and  
FSG48 Packages  
Cascadable for Storing Longer or Multiple Bitstreams  
Design Revision Technology Enables Storing and  
Accessing Multiple Design Revisions for  
Configuration  
Dedicated Boundary-Scan (JTAG) I/O Power Supply (V  
)
CCJ  
I/O Pins Compatible with Voltage Levels Ranging From  
1.8V to 3.3V  
Built-In Data Decompressor Compatible with Xilinx  
Advanced Compression Technology  
Design Support Using the Xilinx ISE® Alliance and  
Foundation™ Software Packages  
Description  
Xilinx introduces the Platform Flash series of in-system  
programmable configuration PROMs. Available in  
8 Mb PROMs that support Master Serial, Slave Serial,  
Master SelectMAP, and Slave SelectMAP FPGA  
configuration modes (Figure 2, page 2).  
1 to 32 Mb densities, these PROMs provide an easy-to-use,  
cost-effective, and reprogrammable method for storing large  
Xilinx FPGA configuration bitstreams. The Platform Flash  
PROM series includes both the 3.3V XCFxxS PROM and  
the 1.8V XCFxxP PROM. The XCFxxS version includes  
4 Mb, 2 Mb, and 1 Mb PROMs that support Master Serial  
and Slave Serial FPGA configuration modes (Figure 1,  
page 2). The XCFxxP version includes 32 Mb, 16 Mb, and  
When driven from a stable, external clock, the PROMs can  
output data at rates up to 33 MHz. Refer to "AC Electrical  
Characteristics," page 16 for timing considerations.  
A summary of the Platform Flash PROM family members  
and supported features is shown in Table 1.  
Table 1: Platform Flash PROM Features  
Density VCCINT VCCO Range VCCJ Range  
Serial Parallel  
Config. Config. Revisioning  
Design  
ProgramIn-system  
via JTAG  
Device  
Packages  
Compression  
(Mb)  
(V)  
3.3  
3.3  
3.3  
(V)  
(V)  
XCF01S  
XCF02S  
XCF04S  
1
2
4
1.8 – 3.3  
1.8 – 3.3  
1.8 – 3.3  
2.5 – 3.3  
2.5 – 3.3  
2.5 – 3.3  
VO20/VOG20  
VO20/VOG20  
VO20/VOG20  
3
3
3
3
3
3
VO48/VOG48  
FS48/FSG48  
XCF08P  
XCF16P  
XCF32P  
Notes:  
8
1.8  
1.8  
1.8  
1.8 – 3.3  
1.8 – 3.3  
1.8 – 3.3  
2.5 – 3.3  
2.5 – 3.3  
2.5 – 3.3  
3
3
3
3
3
3
3
3
3
3(1)  
3
3
3
3
VO48/VOG48  
FS48/FSG48  
16  
32  
VO48/VOG48  
FS48/FSG48  
3
1. XCF08P supports storage of a design revision only when cascaded with another XCFxxP PROM. See "Design Revisioning," page 8 for details.  
© Copyright 2003–2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and  
other countries. All other trademarks are the property of their respective owners.  
DS123 (v2.18) May 19, 2010  
www.xilinx.com  
Product Specification  
1

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