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Spartan-3E FPGA Family:
Complete Data Sheet
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DS312 March 21, 2005
Module 1:
Introduction and Ordering Information
Module 3:
DC and Switching Characteristics
DS312-1 (v1.1) March 21, 2005
6 pages
DS312-3 (v1.0) March 1, 2005
18 pages
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Introduction
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DC Electrical Characteristics
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Absolute Maximum Ratings
Supply Voltage Specifications
Recommended Operating Conditions
DC Characteristics
Features
Architectural Overview
Package Marking
Ordering Information
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Switching Characteristics
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DCM Timing
Configuration and JTAG Timing
Module 2:
Functional Description
DS312-2 (v1.1) March 21, 2005
96 pages
Module 4:
Pinout Descriptions
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Input/Output Blocks (IOBs)
DS312-4 (v1.1) March 21, 2005
72 pages
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Overview
SelectIO™ Signal Standards
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Pin Descriptions
Package Overview
Pinout Tables
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Configurable Logic Block (CLB)
Block RAM
Dedicated Multipliers
Digital Clock Manager (DCM)
Clock Network
Footprint Diagrams
Configuration
Powering Spartan-3E FPGAs
IMPORTANT NOTE: The Spartan™-3E FPGA data sheet is created and published in separate modules. This complete
version is provided for easy downloading and searching of the complete document. Page, figure, and table numbers begin
at 1 for each module, and each module has its own Revision History at the end. Use the PDF "Bookmarks" for easy
navigation in this volume.
© 2005 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc.
All other trademarks are the property of their respective owners.
DS312 March 21, 2005
www.xilinx.com
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