Datasheet > XC3S500E-5VQ100C

XC3S500E-5VQ100C

更新时间： 2024-11-10 04:24:15

品牌	Logo	应用领域
赛灵思 - XILINX		/
页数	文件大小	规格书
193页	1733K
描述
Spartan-3E FPGA Family

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XC3S500E-5VQ100C 数据手册

Spartan-3E FPGA Family:

Complete Data Sheet

DS312 March 21, 2005

Module 1:

Introduction and Ordering Information

Module 3:

DC and Switching Characteristics

DS312-1 (v1.1) March 21, 2005

6 pages

DS312-3 (v1.0) March 1, 2005

18 pages

•

Introduction

•

DC Electrical Characteristics

Absolute Maximum Ratings

Supply Voltage Specifications

Recommended Operating Conditions

DC Characteristics

Features

Architectural Overview

Package Marking

Ordering Information

•

Switching Characteristics

DCM Timing

Configuration and JTAG Timing

Module 2:

Functional Description

DS312-2 (v1.1) March 21, 2005

96 pages

Module 4:

Pinout Descriptions

•

Input/Output Blocks (IOBs)

DS312-4 (v1.1) March 21, 2005

72 pages

Overview

SelectIO™ Signal Standards

•

Pin Descriptions

Package Overview

Pinout Tables

•

Configurable Logic Block (CLB)

Block RAM

Dedicated Multipliers

Digital Clock Manager (DCM)

Clock Network

Footprint Diagrams

Configuration

Powering Spartan-3E FPGAs

IMPORTANT NOTE: The Spartan™-3E FPGA data sheet is created and published in separate modules. This complete

version is provided for easy downloading and searching of the complete document. Page, figure, and table numbers begin

at 1 for each module, and each module has its own Revision History at the end. Use the PDF "Bookmarks" for easy

navigation in this volume.

All other trademarks are the property of their respective owners.

DS312 March 21, 2005

www.xilinx.com

12 3 4 5 6 7...193

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