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XAM3715CBC PDF预览

XAM3715CBC

更新时间： 2024-01-30 22:20:36
品牌 Logo 应用领域
德州仪器 - TI 微控制器和处理器外围集成电路微处理器时钟
页数 文件大小 规格书
257页 2147K
描述
AM3715/03 Applications Processor

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XAM3715CBC 技术参数

生命周期：Obsolete零件包装代码：BGA
包装说明：HBGA,针数：515
Reach Compliance Code：unknown风险等级：5.84
Is Samacsys：N地址总线宽度：16
边界扫描：YES最大时钟频率：38.4 MHz
外部数据总线宽度：16格式：FLOATING POINT
集成缓存：YESJESD-30 代码：S-PBGA-B515
长度：14 mm低功率模式：YES
端子数量：515封装主体材料：PLASTIC/EPOXY
封装代码：HBGA封装形状：SQUARE
封装形式：GRID ARRAY, HEAT SINK/SLUG认证状态：Not Qualified
座面最大高度：1 mm速度：1000 MHz
表面贴装：YES技术：CMOS
端子形式：BALL端子节距：0.5 mm
端子位置：BOTTOM宽度：14 mm
uPs/uCs/外围集成电路类型：MICROPROCESSORBase Number Matches：1

XAM3715CBC 数据手册

 浏览型号XAM3715CBC的Datasheet PDF文件第2页浏览型号XAM3715CBC的Datasheet PDF文件第3页浏览型号XAM3715CBC的Datasheet PDF文件第4页浏览型号XAM3715CBC的Datasheet PDF文件第5页浏览型号XAM3715CBC的Datasheet PDF文件第6页浏览型号XAM3715CBC的Datasheet PDF文件第7页 
AM3715/03  
www.ti.com  
SPRS616B–JUNE 2010–REVISED JULY 2010  
AM3715/03  
Applications Processor  
1 AM3715/03 Applications Processor  
1.1 Features  
1234  
– 1.8-V I/O and 3.0-V (MMC1 only),  
• AM3715/03 Applications Processor:  
– Compatible with OMAP™ 3 Architecture  
– MPU Subsystem  
0.9-V to 1.2-V Adaptive Processor Core  
Voltage  
0.9-V to 1.1-V Adaptive Core Logic Voltage  
Note: These are default Operating  
Performance Point (OPP) voltages and could  
be optimized to lower values using  
SmartReflex AVS.  
•
•
1-GHz ARM CortexTM-A8 Core  
NEON SIMD Coprocessor  
– POWERVR SGX™ Graphics Accelerator  
(AM3715 only)  
•
Tile Based Architecture Delivering up to  
20 MPoly/sec  
– Commercial and Extended Temperature  
Grades  
•
Universal Scalable Shader Engine:  
Multi-threaded Engine Incorporating Pixel  
and Vertex Shader Functionality  
– Serial Communication  
•
5 Multichannel Buffered Serial Ports  
(McBSPs)  
•
•
•
Industry Standard API Support:  
OpenGLES 1.1 and 2.0, OpenVG1.0  
Fine Grained Task Switching, Load  
Balancing, and Power Management  
Programmable High Quality Image  
Anti-Aliasing  
–
–
–
512 Byte Transmit/Receive Buffer  
(McBSP1/3/4/5)  
5K-Byte Transmit/Receive Buffer  
(McBSP2)  
SIDETONE Core Support (McBSP2 and  
3 Only) For Filter, Gain, and Mix  
Operations  
– External Memory Interfaces:  
•
SDRAM Controller (SDRC)  
–
–
Direct Interface to I2S and PCM Device  
and T Buses  
128 Channel Transmit/Receive Mode  
–
16, 32-bit Memory Controller With  
1G-Byte Total Address Space  
–
–
Interfaces to Low-Power SDRAM  
SDRAM Memory Scheduler (SMS) and  
Rotation Engine  
•
•
•
Four Master/Slave Multichannel Serial  
Port Interface (McSPI) Ports  
High-Speed/Full-Speed/Low-Speed USB  
OTG Subsystem (12-/8-Pin ULPI Interface)  
High-Speed/Full-Speed/Low-Speed  
Multiport USB Host Subsystem  
•
General Purpose Memory Controller  
(GPMC)  
–
16-bit Wide Multiplexed Address/Data  
Bus  
Up to 8 Chip Select Pins With  
128M-Byte Address Space per Chip  
Select Pin  
Glueless Interface to NOR Flash,  
NAND Flash (With ECC Hamming  
Code Calculation), SRAM and  
Pseudo-SRAM  
–
12-/8-Pin ULPI Interface or 6-/4-/3-Pin  
Serial Interface  
–
•
•
One HDQ/1-Wire Interface  
Four UARTs (One with Infrared Data  
Association [IrDA] and Consumer Infrared  
[CIR] Modes)  
Three Master/Slave High-Speed  
Inter-Integrated Circuit (I2C) Controllers  
–
•
–
–
Flexible Asynchronous Protocol  
Control for Interface to Custom Logic  
(FPGA, CPLD, ASICs, etc.)  
Nonmultiplexed Address/Data Mode  
(Limited 2K-Byte Address Space)  
– Camera Image Signal Processing (ISP)  
•
•
•
CCD and CMOS Imager Interface  
Memory Data Input  
BT.601/BT.656 Digital YCbCr 4:2:2  
(8-/10-Bit) Interface  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
4
POWERVR SGX is a trademark of Imagination Technologies Ltd.  
OMAP is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
PRODUCT PREVIEW information concerns products in the formative  
or design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right  
to change or discontinue these products without notice.  
Copyright © 2010, Texas Instruments Incorporated  
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