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X9269UV24I-2.7 PDF预览

X9269UV24I-2.7

更新时间： 2024-01-12 06:43:00
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
24页 366K
描述
Single Supply/Low Power/256-Tap/2-Wire Bus

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X9269UV24I-2.7 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：4.40 MM, PLASTIC, TSSOP-24
针数：24Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.92其他特性：NONVOLATILE MEMORY
控制接口：2-WIRE SERIAL转换器类型：DIGITAL POTENTIOMETER
JESD-30 代码：R-PDSO-G24JESD-609代码：e0
长度：7.8 mm湿度敏感等级：1
功能数量：2位置数：256
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP24,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：240电源：3/5 V
认证状态：Not Qualified电阻定律：LINEAR
最大电阻容差：20%最大电阻器端电压：2.7 V
最小电阻器端电压：座面最大高度：1.2 mm
子类别：Digital Potentiometers标称供电电压：2.7 V
表面贴装：YES技术：CMOS
标称温度系数：300 ppm/ °C温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED标称总电阻：50000 Ω
宽度：4.4 mm

X9269UV24I-2.7 数据手册

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X9269  
®
Single Supply/Low Power/256-Tap/2-Wire Bus  
Data Sheet  
March 28, 2005  
FN8173.1  
DESCRIPTION  
Dual Digitally-Controlled (XDCP™)  
Potentiometers  
The X9269 integrates  
potentiometer (XDCP) on  
integrated circuit.  
2
digitally controlled  
monolithic CMOS  
a
FEATURES  
• Dual–Two separate potentiometers  
• 256 resistor taps/pot–0.4% resolution  
• 2-Wire Serial Interface for write, read, and  
transfer operations of the potentiometer single  
supply device  
The digital controlled potentiometer is implemented  
using 255 resistive elements in a series array.  
Between each element are tap points connected to the  
wiper terminal through switches. The position of the  
wiper on the array is controlled by the user through the  
2-Wire bus interface. Each potentiometer has  
associated with it a volatile Wiper Counter Register  
(WCR) and a four nonvolatile Data Registers that can  
be directly written to and read by the user. The  
contents of the WCR controls the position of the wiper  
on the resistor array though the switches. Powerup  
recalls the contents of the default Data Register (DR0)  
to the WCR.  
• Wiper Resistance, 100Ω typical V  
= 5V  
CC  
• 4 Nonvolatile Data Registers for Each  
Potentiometer  
• Nonvolatile Storage of Multiple Wiper Positions  
• Power-on Recall. Loads Saved Wiper Position on  
Power-up.  
• Standby Current < 5µA Max  
• 50kΩ, 100kΩ versions of End to End Pot  
Resistance  
• 100 yr. Data Retention  
The XDCP can be used as a three-terminal  
• Endurance: 100,000 Data Changes per Bit per  
Register  
• 24-Lead SOIC, 24-Lead TSSOP  
• Low Power CMOS  
potentiometer or as a two terminal variable resistor in  
a wide variety of applications including control,  
parameter adjustments, and signal processing.  
• Power Supply V  
= 2.7V to 5.5V  
CC  
FUNCTIONAL DIAGRAM  
V
R
R
H1  
CC  
H0  
Write  
Read  
Address  
Data  
Status  
Transfer  
Inc/Dec  
Power-on Recall  
Bus  
2-Wire  
Bus  
Interface  
Wiper Counter  
Registers (WCR)  
Interface  
and Control  
Data Registers  
(DR0–DR3)  
Control  
V
R
R
R
R
SS  
W0  
L0  
W1  
L1  
50kΩ  
or 100kΩ versions  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
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