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X9268US24I-2.7T1

更新时间： 2024-11-01 19:53:19
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管转换器电阻器
页数 文件大小 规格书
22页 834K
描述
DUAL 50K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24, PLASTIC, SOIC-24

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X9268US24I-2.7T1 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：0.300 INCH, PLASTIC, MS-013AD, SOIC-24
针数：24Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.16其他特性：NONVOLATILE MEMORY
控制接口：2-WIRE SERIAL转换器类型：DIGITAL POTENTIOMETER
JESD-30 代码：R-PDSO-G24长度：15.4 mm
功能数量：2位置数：256
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE认证状态：Not Qualified
电阻定律：LINEAR最大电阻容差：20%
最大电阻器端电压：5.5 V最小电阻器端电压：-5.5 V
座面最大高度：2.65 mm表面贴装：YES
技术：CMOS标称温度系数：300 ppm/ °C
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
标称总电阻：50000 Ω宽度：7.5 mm
Base Number Matches：1

X9268US24I-2.7T1 数据手册

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DATASHEET  
X9268  
FN8172  
Rev.4.00  
August 29, 2006  
Dual Supply/Low Power/256-Tap/2-Wire Bus Dual Digitally-Controlled (XDCP™)  
Potentiometers  
FEATURES  
DESCRIPTION  
• Dual–Two Separate Potentiometers  
• 256 Resistor Taps/Pot–0.4% Resolution  
• 2-Wire Serial Interface for Write, Read, and  
Transfer Operations of the Potentiometer  
• Wiper Resistance, 100typical @ V+ = 5V,  
V- = -5V  
• 16 Nonvolatile Data Registers for Each  
Potentiometer  
• Nonvolatile Storage of Multiple Wiper Positions  
• Power-on Recall. Loads Saved Wiper Position on  
Power-up.  
The X9268 integrates  
potentiometer (XDCP) on  
integrated circuit.  
2
digitally controlled  
monolithic CMOS  
a
The digital controlled potentiometer is implemented  
using 255 resistive elements in a series array.  
Between each element are tap points connected to the  
wiper terminal through switches. The position of the  
wiper on the array is controlled by the user through the  
2-Wire bus interface. Each potentiometer has  
associated with it a volatile Wiper Counter Register  
(WCR) and a four nonvolatile Data Registers that can  
be directly written to and read by the user. The  
contents of the WCR controls the position of the wiper  
on the resistor array though the switches. Powerup  
recalls the contents of the default Data Register (DR0)  
to the WCR.  
• Standby Current <5µA Max  
• V : ±2.7V to ±5.5V Operation  
CC  
• 50k, 100kVersions of End to End Pot  
Resistance  
• Endurance: 100,000 Data Changes per Bit per  
Register  
• 100 yr. Data Retention  
• 24 Ld SOIC  
• Low Power CMOS  
The XDCP can be used as  
a three-terminal  
potentiometer or as a two terminal variable resistor in  
a wide variety of applications including control,  
parameter adjustments, and signal processing.  
• Power Supply V  
= ±2.7V to ±5.5V  
CC  
V+ = 2.7V to 5.5V  
V- = -2.7V to -5.5V  
• Pb-Free Plus Anneal Available (RoHS Compliant)  
FUNCTIONAL DIAGRAM  
V
R
R
H1  
V
CC  
H0  
+
Write  
Read  
Address  
Data  
Status  
Transfer  
Inc/Dec  
Power-on Recall  
Bus  
2-Wire  
Bus  
Interface  
Wiper Counter  
Registers (WCR)  
Interface  
and Control  
Data Registers  
(DR0–DR3)  
Control  
V
R
R
R
R
V-  
SS  
W0  
L0  
W1  
L1  
50k  
or 100kversions  
FN8172 Rev.4.00  
August 29, 2006  
Page 1 of 22  
1234567...22

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