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X9269TB24I

更新时间: 2024-12-02 09:33:43
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
24页 146K
描述
Digital Potentiometer, 2 Func, 100000ohm, 2-wire Serial Control Interface, 256 Positions, CMOS, PBGA24, XBGA-24

X9269TB24I 数据手册

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APPLICATION NOTES AND DEVELOPMENT SYSTEM  
A V A I L A B L E  
AN99 • AN115 • AN124 •AN133 • AN134 • AN135  
Single Supply / Low Power / 256-tap / 2-Wire bus  
X9269  
Dual Digitally-Controlled (XDCPTM) Potentiometers  
FEATURES  
DESCRIPTION  
• Dual–Two separate potentiometers  
• 256 resistor taps/pot–0.4% resolution  
• 2-Wire Serial Interface for write, read, and  
transfer operations of the potentiometer  
Wiper Resistance, 100typical @ V+ = 5V, V- = -5V  
• 16 Nonvolatile Data Registers for Each  
Potentiometer  
• Nonvolatile Storage of Multiple Wiper Positions  
• Power On Recall. Loads Saved Wiper Position on  
Power Up.  
• Standby Current < 5µA Max  
• 50K, 100Kversions of End to End Pot  
Resistance  
• Endurance: 100,000 Data Changes per Bit per  
Register  
• 100 yr. Data Retention  
• 24-Lead SOIC, 24-Lead XBGA  
• Low Power CMOS  
The X9269 integrates  
potentiometer (XDCP) on  
integrated circuit.  
2
digitally controlled  
monolithic CMOS  
a
The digital controlled potentiometer is implemented  
using 255 resistive elements in a series array.  
Between each element are tap points connected to the  
wiper terminal through switches. The position of the  
wiper on the array is controlled by the user through the  
2-Wire bus interface. Each potentiometer has  
associated with it a volatile Wiper Counter Register  
(WCR) and a four nonvolatile Data Registers that can  
be directly written to and read by the user. The  
contents of the WCR controls the position of the wiper  
on the resistor array though the switches. Powerup  
recalls the contents of the default Data Register (DR0)  
to the WCR.  
The XDCP can be used as  
a three-terminal  
• Power Supply V  
= 2.7V to 5.5V  
potentiometer or as a two terminal variable resistor in  
a wide variety of applications including control,  
parameter adjustments, and signal processing.  
CC  
FUNCTIONAL DIAGRAM  
V
R
R
H1  
CC  
H0  
Write  
Read  
Address  
Data  
Status  
Transfer  
Inc/Dec  
Power On Recall  
Bus  
2-Wire  
Wiper Counter  
Registers (WCR)  
Bus  
Interface  
and Control  
Interface  
Data Registers  
(DR0–DR3)  
Control  
V
R
R
R
R
L1  
SS  
W0  
L0  
W1  
50Kor 100Kversions  
Characteristics subject to change without notice. 1 of 24  
REV 1.1.3 4/3/01  
www.xicor.com  

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