Datasheet > X9252YV24-2.7

X9252YV24-2.7

更新时间： 2024-01-30 13:38:53

品牌	Logo	应用领域
XICOR		/
页数	文件大小	规格书
21页	126K
描述
Quad Digitally-Controlled (XDCP) potentiometer

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中文翻译

获取价格

数据手册

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X9252YV24-2.7 数据手册

New Feature

Low Power + Quad 256-tap +

2-Wire bus + Up/Down interface

Dual Interface

Quad Digitally-Controlled (XDCP^TM) Potentiometer X9252

FEATURES

DESCRIPTION

• Quad solid state potentiometer

The X9252 integrates 4 digitally controlled potentio-

meters (XDCP) on a monolithic CMOS integrated

circuit.

• 256 wiper tap points–0.4% resolution

• 2-wire serial interface for Write, Read, and

transfer operations of the potentiometer

• Up/down interface for individual potentiometers

• Wiper resistance: 40Ω typical

• Non-volatile storage of wiper positions

• Power On Recall. Loads saved wiper position on

Power-Up.

The digitally controlled potentiometers are imple-

mented using 255 resistive elements in a series array.

Between each pair of elements are tap points con-

nected to wiper terminals through switches. The posi-

tion of each wiper on the array is controlled by the user

through the Up/Down (U/D) or 2-wire bus interface.

The wiper of each potentiometer has an associated

volatile Wiper Counter Register (WCR) and four non-

volatile Data Registers (DRs) that can be directly writ-

ten to and read by the user. The contents of the WCR

controls the position of the wiper on the resistor array

though the switches. At power-up, the device recalls

the contents of the default data registers DR00, DR10,

DR20, DR30, to the corresponding WCR.

• Standby current < 20µA Max

• Maximum wiper current: 3mA

• V : 2.7V to 5.5V operation

• 2.8kΩ,10kΩ, 50kΩ, 100kΩ version of total pot

resistance

• Endurance: 100, 000 data changes per bit per

• 100 yr. data retention

• 24-Lead TSSOP

Each DCP can be used as a three-terminal potentio-

meter or as a two terminal variable resistor in a wide

variety of applications including the programming of

bias voltages, the implementation of ladder networks,

and three resistor programmable networks.

FUNCTIONAL DIAGRAM

2-Wire

Interface

DCP1

DCP3

DCP2

DCP0

WCR1

DR10

WCR3

DR30

WCR2

DR20

WCR0

DR00

DR11

DR12

DR13

DR31

DR32

DR33

DR21

DR22

DR23

DR01

DR02

DR03

POWER UP,

INTERFACE

CONTROL

AND

SDA

SCL

STATUS

Up-Down

Interface

DS0

DS1

U/D

1 of 21

REV 1.4.1 7/29/03

www.xicor.com

12 3 4 5 6 7...21

中文翻译

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与X9252YV24-2.7相关器件

型号	品牌	获取价格	描述	数据表
X9252YV24I-2.7	XICOR	获取价格	Quad Digitally-Controlled (XDCP) potentiometer
X9252YV24I-2.7	INTERSIL	获取价格	Low Power + Quad 256-Tap + 2-Wire Bus + Up/Down Interface
X9252YV24IZ-2.7	INTERSIL	获取价格	Low Power + Quad 256-Tap + 2-Wire Bus + Up/Down Interface
X9258	INTERSIL	获取价格	Low Noise/Low Power/2-Wire Bus/256 Taps
X9258	XICOR	获取价格	Quad Digital Controlled Potentiometers (XDCP)
X9258	RENESAS	获取价格	Low Noise, Low Power, 2-Wire Bus, 256 Taps Quad Digital Controlled Potentiometer (XDCP?)
X9258)06	INTERSIL	获取价格	Quad Digital Controlled Potentiometers
X9258_11	INTERSIL	获取价格	Quad Digital Controlled Potentiometers(XDCP?)
X9258_13	INTERSIL	获取价格	Low Noise/Low Power/2-Wire Bus/256 Taps
X9258TB24	XICOR	获取价格	Quad Digital Controlled Potentiometers (XDCP)

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