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X5163PIZ-2.7

更新时间: 2024-11-07 03:15:15
品牌 Logo 应用领域
英特矽尔 - INTERSIL 光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
21页 365K
描述
CPU Supervisor with 16Kbit SPI EEPROM

X5163PIZ-2.7 数据手册

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X5163, X5165  
®
Data Sheet  
June 1, 2006  
FN8128.3  
CPU Supervisor with 16Kbit SPI EEPROM  
Description  
These devices combine four popular functions, Power-on  
Reset Control, Watchdog Timer, Supply Voltage Supervision,  
and Block Lock Protect Serial EEPROM Memory in one  
package. This combination lowers system cost, reduces  
board space requirements, and increases reliability.  
Features  
• Selectable watchdog timer  
• Low VCC detection and reset assertion  
- Five standard reset threshold voltages  
- Re-program low VCC reset threshold voltage using  
special programming sequence  
- Reset signal valid to VCC = 1V  
• Determine watchdog or low voltage reset with a volatile  
flag bit  
Applying power to the device activates the power-on reset  
circuit which holds RESET/RESET active for a period of  
time. This allows the power supply and oscillator to stabilize  
before the processor can execute code.  
• Long battery life with low power consumption  
- <50µA max standby current, watchdog on  
- <1µA max standby current, watchdog off  
- <400µA max active current during read  
The Watchdog Timer provides an independent protection  
mechanism for microcontrollers. When the microcontroller  
fails to restart a timer within a selectable time out interval, the  
device activates the RESET/RESET signal. The user selects  
the interval from three preset values. Once selected, the  
interval does not change, even after cycling the power.  
• 16kbits of EEPROM  
• Built-in inadvertent write protection  
- Power-up/power-down protection circuitry  
- Protect 0, 1/4, 1/2 or all of EEPROM array with Block  
Lockprotection  
The device’s low VCC detection circuitry protects the user’s  
system from low voltage conditions, resetting the system when  
- In-circuit programmable ROM mode  
VCC falls below the minimum VCC trip point. RESET/RESET is  
• 2MHz SPI interface modes (0,0 & 1,1)  
asserted until VCC returns to proper operating level and  
stabilizes. Five industry standard VTRIP thresholds are  
available, however, Intersil’s unique circuits allow the  
threshold to be reprogrammed to meet custom requirements  
or to fine-tune the threshold for applications requiring higher  
precision.  
• Minimize EEPROM programming time  
- 32-byte page write mode  
- Self-timed write cycle  
- 5ms write cycle time (typical)  
• 2.7V to 5.5V and 4.5V to 5.5V power supply operation  
• Available packages: 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP  
• Pb-free plus anneal available (RoHS compliant)  
Pinouts  
14 Ld TSSOP  
X5163, X5165  
8 Ld SOIC/PDIP  
X5163, X5165  
CS/WDI  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
CC  
SO  
NC  
RESET/RESET  
V
1
8
CS/WDI  
SO  
CC  
NC  
NC  
NC  
SCK  
SI  
2
3
7
6
RESET/RESET  
SCK  
NC  
NC  
WP  
X5163, X5165  
WP  
V
SS  
4
5
SI  
V
SS  
8
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved  
1
All other trademarks mentioned are the property of their respective owners.  

X5163PIZ-2.7 替代型号

型号 品牌 替代类型 描述 数据表
X5163S8Z-2.7 INTERSIL

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CPU Supervisor with 16Kbit SPI EEPROM
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CPU Supervisor with 16Kbit SPI EEPROM Description

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