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X5163S8-2.7 PDF预览

X5163S8-2.7

更新时间： 2024-11-07 21:16:23
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管
页数 文件大小 规格书
22页 891K
描述
1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, PLASTIC, SOIC-8

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X5163S8-2.7 技术参数

是否Rohs认证：不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOIC-8
针数：8Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.72Is Samacsys：N
可调阈值：YES模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码：R-PDSO-G8JESD-609代码：e0
长度：4.9 mm信道数量：1
功能数量：1端子数量：8
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
认证状态：Not Qualified座面最大高度：1.75 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
宽度：3.9 mmBase Number Matches：1

X5163S8-2.7 数据手册

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DATASHEET  
X5163, X5165  
CPU Supervisor with 16Kbit SPI EEPROM  
FN8128  
Rev 4.00  
August 13, 2015  
Description  
Features  
These devices combine four popular functions, Power-on  
Reset Control, Watchdog Timer, Supply Voltage Supervision,  
and Block Lock Protect Serial EEPROM Memory in one  
package. This combination lowers system cost, reduces  
board space requirements, and increases reliability.  
• Selectable watchdog timer  
• Low VCC detection and reset assertion  
- Five standard reset threshold voltages  
- Re-program low VCC reset threshold voltage using  
special programming sequence  
Applying power to the device activates the power-on reset  
circuit which holds RESET/RESET active for a period of  
time. This allows the power supply and oscillator to stabilize  
before the processor can execute code.  
- Reset signal valid to VCC = 1V  
• Determine watchdog or low voltage reset with a volatile  
flag bit  
• Long battery life with low power consumption  
- <50µA max standby current, watchdog on  
- <1µA max standby current, watchdog off  
- <400µA max active current during read  
The Watchdog Timer provides an independent protection  
mechanism for microcontrollers. When the microcontroller  
fails to restart a timer within a selectable time out interval, the  
device activates the RESET/RESET signal. The user selects  
the interval from three preset values. Once selected, the  
interval does not change, even after cycling the power.  
• 16kbits of EEPROM  
• Built-in inadvertent write protection  
The device’s low VCC detection circuitry protects the user’s  
system from low voltage conditions, resetting the system when  
- Power-up/power-down protection circuitry  
- Protect 0, 1/4, 1/2 or all of EEPROM array with Block  
Lock™ protection  
VCC falls below the minimum VCC trip point. RESET/RESET is  
asserted until VCC returns to proper operating level and  
stabilizes. Five industry standard VTRIP thresholds are  
available, however, Intersil’s unique circuits allow the  
threshold to be reprogrammed to meet custom requirements  
or to fine-tune the threshold for applications requiring higher  
precision.  
- In-circuit programmable ROM mode  
• 2MHz SPI interface modes (0,0 & 1,1)  
• Minimize EEPROM programming time  
- 32-byte page write mode  
- Self-timed write cycle  
- 5ms write cycle time (typical)  
• 2.7V to 5.5V and 4.5V to 5.5V power supply operation  
• Available packages: 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP  
• Pb-free plus anneal available (RoHS compliant)  
Pinouts  
14 Ld TSSOP  
X5163, X5165  
8 Ld SOIC/PDIP  
X5163, X5165  
CS/WDI  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
CC  
SO  
NC  
RESET/RESET  
V
1
8
CS/WDI  
SO  
CC  
NC  
NC  
NC  
SCK  
SI  
2
3
7
6
RESET/RESET  
SCK  
NC  
NC  
WP  
X5163, X5165  
WP  
V
SS  
4
5
SI  
V
SS  
8
FN8128 Rev 4.00  
August 13, 2015  
Page 1 of 22  
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