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X25326V14 PDF预览

X25326V14

更新时间： 2024-11-29 22:36:11
品牌 Logo 应用领域
XICOR 可编程只读存储器
页数 文件大小 规格书
15页 79K
描述
Programmable Watchdog Timer w/Serial E 2 PROM

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中文翻译

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X25326V14 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：PLASTIC, TSSOP-14Reach Compliance Code：unknown
风险等级：5.92JESD-30 代码：R-PDSO-G14
JESD-609代码：e0长度：5 mm
端子数量：14最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4.4 mm
uPs/uCs/外围集成电路类型：MICROPROCESSOR CIRCUIT

X25326V14 数据手册

 浏览型号X25326V14的Datasheet PDF文件第2页浏览型号X25326V14的Datasheet PDF文件第3页浏览型号X25326V14的Datasheet PDF文件第4页浏览型号X25326V14的Datasheet PDF文件第5页浏览型号X25326V14的Datasheet PDF文件第6页浏览型号X25326V14的Datasheet PDF文件第7页 
8K x 8 Bit  
4K x 8 Bit  
2K x 8 Bit  
64K  
32K  
16K  
X25644/46  
X25324/26  
X25164/66  
Programmable Watchdog Timer w/Serial E2PROM  
FEATURES  
DESCRIPTION  
• Programmable Watchdog Timer with Reset  
Assertion  
—Reset Signal Valid to Vcc=1V  
—Power Up Reset Control  
These devices combine two popular functions, Watchdog  
Timer, and Serial E2PROM Memory in one package.This  
combination lowers system cost, reduces board space  
requirements, and increases reliability.  
• Save Critical Data With Block LockTM Protection  
—Block LockTM Protect 0, 1/4, 1/2 or all of  
Serial E2PROM Memory Array  
• In Circuit Programmable ROM Mode  
• Long Battery Life With Low Power Consumption  
—<50µA Max Standby Current, Watchdog On  
—<1µA Max Standby Current, Watchdog Off  
—<5mA Max Active Current during Write  
—<400µA Max Active Current during Read  
• 1.8V to 3.6V, 2.7V to 5.5V and 4.5V to 5.5V Power  
Supply Operation  
• 2MHz Clock Rate  
• Minimize Programming Time  
—32 Byte Page Write Mode  
—Self-Timed Write Cycle  
—5ms Write Cycle Time (Typical)  
• SPI Modes (0,0 & 1,1)  
The Watchdog Timer provides an independent protection  
mechanism for microcontrollers. During a system failure,  
the device will respond with a RESET/RESET signal  
after a selectable time-out interval. The user selects the  
interval from three preset values. Once selected, the  
interval does not change, even after cycling the power.  
The memory portion of the device is a CMOS Serial  
E2PROM array with Xicor’s Block LockTM Protection. The  
array is internally organized as x 8.The device features a  
Serial Peripheral Interface (SPI) and software protocol  
allowing operation on a simple four-wire bus.  
The device utilizes Xicor’s proprietary Direct WriteTM cell,  
providing a minimum endurance of 100,000 cycles per  
sector and a minimum data retention of 100 years.  
• Built-in Inadvertent Write Protection  
—Power-Up/Power-Down Protection Circuitry  
—Write Enable Latch  
—Write Protect Pin  
• High Reliability  
• Available Packages  
—14-Lead SOIC (X2564x)  
—14-Lead TSSOP (X2532x, X2516x)  
—8-Lead SOIC (X2532x, X2516x)  
BLOCK DIAGRAM  
SI  
DATA  
PAGE DECODE LOGIC  
REGISTER  
SO  
32  
8
COMMAND  
DECODE &  
CONTROL  
LOGIC  
X - DECODE  
LOGIC  
SCK  
CS  
SERIAL  
E2PROM  
ARRAY  
RESET  
CONTROL  
STATUS  
REGISTER  
RESET/RESET  
WATCHDOG  
TIMER  
HIGH  
VOLTAGE  
CONTROL  
WRITE,  
BLOCK LOCK &  
ICP ROM CONTROL  
WP  
7029 FRM 01  
Xicor, Inc. 1994, 1995, 1996 Patents Pending  
7050 -1.0 6/20/97 T0/C0/D0 SH  
Characteristics subject to change without notice  
1
1234567...15

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