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X25328V14I

更新时间： 2024-12-01 03:54:11
品牌 Logo 应用领域
XICOR 电源电路电源管理电路光电二极管监控可编程只读存储器
页数 文件大小 规格书
16页 75K
描述
V CC Supervisory Circuit w/Serial E 2 PROM

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中文翻译

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X25328V14I 技术参数

是否Rohs认证：不符合生命周期：Obsolete
包装说明：PLASTIC, TSSOP-14Reach Compliance Code：unknown
风险等级：5.92Is Samacsys：N
模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUITJESD-30 代码：R-PDSO-G14
JESD-609代码：e0长度：5 mm
功能数量：1端子数量：14
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：1.2 mm表面贴装：YES
技术：CMOS端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

X25328V14I 数据手册

 浏览型号X25328V14I的Datasheet PDF文件第2页浏览型号X25328V14I的Datasheet PDF文件第3页浏览型号X25328V14I的Datasheet PDF文件第4页浏览型号X25328V14I的Datasheet PDF文件第5页浏览型号X25328V14I的Datasheet PDF文件第6页浏览型号X25328V14I的Datasheet PDF文件第7页 
64K  
32K  
16K  
X25648/49,  
X25328/29,  
X25168/69  
8K x 8 Bit  
4K x 8 Bit  
2K x 8 Bit  
V
Supervisory Circuit w/Serial E2PROM  
CC  
FEATURES  
DESCRIPTION  
• Low Vcc Detection and Reset Assertion  
—Reset Signal Valid to Vcc=1V  
• Save Critical Data With Block LockTM Protection  
—Block LockTM Protect 0, 1/4, 1/2 or all of  
Serial E2PROM Memory Array  
• In Circuit Programmable ROM Mode  
• Long Battery Life With Low Power Consumption  
—<1µA Max Standby Current  
—<5mA Max Active Current during Write  
—<400µA Max Active Current during Read  
• 1.8V to 3.6V, 2.7V to 5.5V and 4.5V to 5.5V Power  
Supply Operation  
• 2MHz Clock Rate  
• Minimize Programming Time  
—32 Byte Page Write Mode  
—Self-Timed Write Cycle  
—5ms Write Cycle Time (Typical)  
• SPI Modes (0,0 & 1,1)  
These devices combines two popular functions, Supply  
Voltage Supervision and Serial E2PROM Memory in one  
package. This combination lowers system cost, reduces  
board space requirements, and increases reliability.  
The user’s system is protected from low voltage condi-  
tions by the devices low Vcc detection circuitry. When  
Vcc falls below the minimum Vcc trip point, the system is  
reset. RESET/RESET is asserted until Vcc returns to  
proper operating levels and stabilizes.  
The memory portion of the device is a CMOS Serial  
E2PROM array with Xicor’s Block LockTM Protection. The  
array is internally organized as x 8.The device features a  
Serial Peripheral Interface (SPI) and software protocol  
allowing operation on a simple four-wire bus.  
The device utilizes Xicor’s proprietary Direct WriteTM cell,  
providing a minimum endurance of 100,000 cycles per  
sector and a minimum data retention of 100 years.  
• Built-in Inadvertent Write Protection  
—Power-Up/Power-Down Protection Circuitry  
—Write Enable Latch  
—Write Protect Pin  
• High Reliability  
• Available Packages  
—14-Lead SOIC (X2564X)  
—14-Lead TSSOP (X2532X, X2516X)  
—8-Lead SOIC (X2532X, X2516X)  
BLOCK DIAGRAM  
SI  
DATA  
PAGE DECODE LOGIC  
REGISTER  
SO  
32  
8
COMMAND  
DECODE &  
CONTROL  
LOGIC  
X - DECODE  
LOGIC  
SCK  
CS  
SERIAL  
E2PROM  
ARRAY  
STATUS  
REGISTER  
RESET  
CONTROL  
RESET/RESET  
LOW  
VOLTAGE  
SENSE  
V
CC  
HIGH  
VOLTAGE  
CONTROL  
PROGRAMMING,  
BLOCK LOCK &  
ICP ROM CONTROL  
WP  
7036 FRM 01  
Xicor, Inc. 1994, 1995, 1996 Patents Pending  
7032 -1.1 6/17/97 T1/C0/D0 SH  
Characteristics subject to change without notice  
1
1234567...16

中文翻译

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