Datasheet > WS512K32V-120G2TIA

WS512K32V-120G2TIA

更新时间： 2024-02-28 00:54:30

品牌	Logo	应用领域
美高森美 - MICROSEMI		静态存储器
页数	文件大小	规格书
8页	319K
描述
Standard SRAM, 512KX32, 120ns, CMOS, CQFP68, 22.40 X 22.40 MM, 4.57 MM HEIGHT, CERAMIC, QFP-68

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WS512K32V-120G2TIA 数据手册

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WS512K32V-XXX

White Electronic Designs

ADVANCED*

512Kx32 SRAM 3.3V MODULE

FEATURES

ꢀ

Access Times of 70, 85, 100, 120ns

Packaging

ꢀ

TTL Compatible Inputs and Outputs

ꢀ

Low Voltage Operation:

• 3.3V 10% Power Supply

Low Power CMOS

• 66-pin, PGA Type, 1.185 inch square, Hermetic

Ceramic HIP (Package 401)

ꢀ

• 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880

inch), 4.57mm (0.180") high (Package 510).

Designed to ﬁt JEDEC 68 lead 0.990" CQFJ

footprint

Built-in Decoupling Caps and Multiple Ground Pins

for Low Noise Operation

ꢀ

Weight

WS512K32V-XG2TX - 8 grams typical

WS512K32V-XHX - 13 grams typical

ꢀ

Organized as 512Kx32; User Conﬁgurable as

1024Kx16 or 2Mx8

Commercial, Industrial and Military Temperature

Ranges

* This product is under development, is not qualiﬁed or characterized and is subject to

change or cancellation without notice.

PIN CONFIGURATION FOR WS512K32NV-XHX

Top View

Pin Description

I/O_0-31

A_0-18

Data Inputs/Outputs

Address Inputs

Write Enables

Chip Selects

Output Enable

Power Supply

Ground

I/O8

I/O9

I/O10

A13

WE2#

CS²#

GND

I/O¹¹

A10

I/O15

I/O24

I/O25

I/O26

VCC

CS4#

WE⁴#

I/O²⁷

I/O31

I/O30

I/O29

I/O28

WE_1-4

I/O14

I/O13

I/O12

OE#

A¹⁸

CS_1-4

OE#

V_CC

GND

Not Connected

A14

A15

A11

Block Diagram

A16

A12

WE1#

I/O⁷

A⁸

WE₁# CS₁#

WE₂# CS₂#

WE₃# CS₃#

WE₄# CS₄#

OE#

A_0-18

A17

VCC

WE3#

CS³#

GND

I/O¹⁹

I/O23

I/O22

I/O21

I/O20

I/O0

I/O1

I/O2

CS1#

I/O6

I/O16

I/O17

I/O18

512K x 8

I/O5

I/O³

I/O4

I/O_0-7

I/O_8-15

I/O_16-23

I/O_24-31

February 2000

Rev. 2

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

12 3 4 5 6 7 8

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