Datasheet > W3EG6432S202D3I

W3EG6432S202D3I

更新时间： 2024-11-07 20:39:43

品牌	Logo	应用领域
WEDC		动态存储器
页数	文件大小	规格书
11页	141K
描述
DRAM,

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中文翻译

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数据手册

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W3EG6432S202D3I 数据手册

W3EG6432S-D3

White Electronic Designs

PRELIMINARY*

256MB- 32Mx64 DDR SDRAM UNBUFFERED

FEATURES

DESCRIPTION

ꢀ

Double-data-rate architecture

The W3EG6432S is a 32Mx64 Double Data Rate

SDRAM memory module based on 256Mb DDR SDRAM

component. The module consists of eight 32Mx8 DDR

SDRAMs in 66 pin TSOP packages mounted on a 184

pin FR4 substrate.

Industrial Temperature

Bi-directional data strobes (DQS)

Differential clock inputs (CK & CK#)

Programmable Read Latency 2,2.5 (clock)

Programmable Burst Length (2,4,8)

Programmable Burst type (sequential & interleave)

Edge aligned data output, center aligned data input.

Auto and self refresh

Synchronous design allows precise cycle control with the

use of system clock. Data I/O transactions are possible on

both edges and Burst Lengths allow the same device to be

useful for a variety of high bandwidth, high performance

memory system applications.

Serial presence detect

* This product is under development, is not qualiﬁed or characterized and is subject to

change without notice.

Power supply: V_CC: 2.5V 0.20V

JEDEC standard 184 pin DIMM package

OPERATING FREQUENCIES

DDR266 @CL=2

133MHz

DDR266 @CL=2

133MHz

DDR266 @CL=2.5

133MHz

DDR200 @CL=2

100MHz

Clock Speed

CL-t_RCD-t_RP

2-2-2

2-3-3

2.5-3-3

2-2-2

September 2004

Rev. 4

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

12 3 4 5 6 7...11

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