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VP211 PDF预览

VP211

更新时间: 2022-11-25 21:49:40
品牌 Logo 应用领域
MITEL 转换器模数转换器
页数 文件大小 规格书
8页 136K
描述
Dual 90MHz 6-Bit Analog to Digital Converter

VP211 数据手册

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VP211  
should further be improved by using a 47mF tantalum  
capacitor in parallel with a 100nF ceramic capacitor. If VCCA  
is derived from VCCD, a small inductor should be used to  
reduce digital noise on the analog power supply. Jitter and  
noise on clock input pins must be minimised. Long clock  
lines should therefore be avoided and all clock lines correctly  
terminated. Cross talk of digital signals to the analog inputs  
must also be prevented as sampling cross talk produces DC  
offsets on the sampled data, for this reason analog inputs  
should not be run next to clock or data lines. Device  
connections to the ground plane should be as short as  
possible.  
Layout And Grounding  
As with all high speed A to D converters, careful  
consideration must be given to the PCB layout. High  
performance can be obtained from the VP211 by tying all  
grounds to a solid low impedance ground plane. Separate  
analog and digital ground planes with a single common link  
under the device can also be used to help reduce the  
amount of digital noise fed back into the analog section of the  
converter.  
The VP211 should be decoupled with low impedance  
100nF ceramic capacitors close to the package pins to avoid  
lead inductance effects and the decoupling on supply lines  
1
28  
CLKIN  
1.2mH  
50R  
2
27  
A Channel  
100n  
3
Data  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
4
100n  
5
VP211  
Cc  
Ccomp  
6
VINA  
50R  
7
8
VCCD  
VCCA  
47m  
47m  
100n  
100n  
100n  
100n  
9
100n  
10  
11  
12  
13  
14  
Cc  
Ccomp  
B Channel  
Data  
VINB  
50R  
100n  
Analog Ground  
Digital Ground  
Fig.5 Applications diagram  
Application Circuit  
A ripple voltage £ 10mV is recommended for good  
system performance, e.g. If the analog input frequency Fin=  
Fig.5 shows a typical applications circuit for the VP211.  
The supply connections are made using separate low noise  
digital and analog power supplies and VCCD is further  
isolated from VCCO using a 1.2mH inductor.  
The COMPA and COMPB pins must be decoupled to  
reduce any ripple at low frequencies which may distort the  
ADC driver amplifier output, (see Fig.2.) The decoupling  
capacitor value is determined by the required low frequency  
performance of the system and can be obtained from the  
following equation.  
10KHz a value of 0.75mF is required for CComp  
.
To ensure effective A.C. coupling at low input  
frequencies, the coupling capacitors on pins 6 and 11 can be  
calculated from the high pass filter corner frequency  
equation,  
F
=
1
c
2 x p x RC  
- 6  
C
=
75x10  
x V  
Comp  
where  
F
Fc = Lower -3dB corner frequency  
(R = Input Resistance, 25K typ. - 20K min)  
in  
Ripple  
6

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