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VN3205N3-GP014 PDF预览

VN3205N3-GP014

更新时间： 2024-11-19 01:01:43
品牌 Logo 应用领域
超科 - SUPERTEX 输入元件开关晶体管
页数 文件大小 规格书
6页 728K
描述
N-Channel Enhancement-Mode Vertical DMOS FETs

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中文翻译

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VN3205N3-GP014 技术参数

是否Rohs认证： 符合生命周期：Transferred
包装说明：CYLINDRICAL, O-PBCY-T3Reach Compliance Code：unknown
风险等级：5.07其他特性：HIGH INPUT IMPEDANCE
配置：SINGLE WITH BUILT-IN DIODE最小漏源击穿电压：50 V
最大漏极电流 (ID)：1.2 A最大漏源导通电阻：0.3 Ω
FET 技术：METAL-OXIDE SEMICONDUCTOR最大反馈电容 (Crss)：30 pF
JEDEC-95代码：TO-92JESD-30 代码：O-PBCY-T3
JESD-609代码：e3元件数量：1
端子数量：3工作模式：ENHANCEMENT MODE
最高工作温度：150 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装形状：ROUND
封装形式：CYLINDRICAL峰值回流温度（摄氏度）：NOT SPECIFIED
极性/信道类型：N-CHANNEL最大功率耗散 (Abs)：1 W
表面贴装：NO端子面层：Matte Tin (Sn)
端子形式：THROUGH-HOLE端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED晶体管应用：SWITCHING
晶体管元件材料：SILICONBase Number Matches：1

VN3205N3-GP014 数据手册

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Supertex inc.  
VN3205  
N-Channel Enhancement-Mode  
Vertical DMOS FETs  
Features  
General Description  
► Free from secondary breakdown  
► Low power drive requirement  
► Ease of paralleling  
This enhancement-mode (normally-off) transistor utilizes  
a vertical DMOS structure and Supertex’s well-proven  
silicon-gate manufacturing process. This combination  
produces a device with the power handling capabilities of  
bipolar transistors and with the high input impedance and  
positive temperature coefficient inherent in MOS devices.  
Characteristic of all MOS structures, this device is free  
from thermal runaway and thermally induced secondary  
breakdown.  
► Low CISS and fast switching speeds  
► Excellent thermal stability  
► Integral source-drain diode  
► High input impedance and high gain  
Applications  
► Motor controls  
► Converters  
► Amplifiers  
► Switches  
► Power supply circuits  
► Drivers (relays, hammers, solenoids, lamps,  
memories, displays, bipolar transistors, etc.)  
Supertex’s vertical DMOS FETs are ideally suited to a  
wide range of switching and amplifying applications where  
high breakdown voltage, high input impedance, low input  
capacitance, and fast switching speeds are desired.  
Ordering Information  
Product Summary  
RDS(ON)  
(max) (Ω)  
0.3  
BVDSS/BVDGS  
VGS(th)  
(max) (V)  
Part Number  
Package Option  
Packing  
(V)  
VN3205N3-G  
3-Lead TO-92  
1000/Bag  
50  
2.4  
VN3205N3-G P002  
VN3205N3-G P003  
Pin Configuration  
VN3205N3-G P005 3-Lead TO-92  
VN3205N3-G P013  
2000/Reel  
DRAIN  
VN3205N3-G P014  
SOURCE  
3-Lead TO-243AA (SOT-89)  
VN3205N8-G  
VN3205NW  
VN3205NJ  
VN3205ND  
2000/Reel  
GATE  
Die in wafer form  
Die on adhesive tape  
Die in waffle pack  
---  
---  
---  
TO-92 (N3)  
DRAIN  
For packaged products, -G indicates package is RoHS compliant (‘Green’).  
TO-92 taping specifications and winding styles per EIA-468 Standard.  
Devices in Wafer / Die form are RoHS compliant (‘Green’).  
SOURCE  
DRAIN  
GATE  
Refer to Die Specification VF32 for layout and dimensions.  
TO-243AA (SOT-89) (N8)  
Absolute Maximum Ratings  
Parameter  
Value  
BVDSS  
BVDGS  
±20V  
Product Marking  
Drain-to-source voltage  
Drain-to-gate voltage  
YY = Year Sealed  
SiVN  
3 2 0 5  
YYWW  
WW = Week Sealed  
= “Green” Packaging  
Gate-to-source voltage  
Operating and storage temperature  
-55OC to +150OC  
Package may or may not include the following marks: Si or  
Absolute Maximum Ratings are those values beyond which damage to the device may  
occur. Functional operation under these conditions is not implied. Continuous operation  
of the device at the absolute rating level may affect device reliability. All voltages are  
referenced to device ground.  
TO-92 (N3)  
W = Code for week sealed  
VN2LW  
= “Green” Packaging  
Package may or may not include the following marks: Si or  
Typical Thermal Resistance  
TO-243AA (SOT-89) (N8)  
Package  
θja  
3-Lead TO-92  
132OC/W  
133OC/W  
3-Lead TO-243AA (SOT-89)  
Doc.# DSFP-VN3205  
C101612  
Supertex inc.  
www.supertex.com  
123456

中文翻译

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