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UPD780021AF1-XXX-CN3 PDF预览

UPD780021AF1-XXX-CN3

更新时间: 2024-11-25 11:51:23
品牌 Logo 应用领域
日电电子 - NEC 微控制器和处理器外围集成电路时钟
页数 文件大小 规格书
96页 659K
描述
8-BIT SINGLE-CHIP MICROCONTROLLERS

UPD780021AF1-XXX-CN3 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:9 X 9 MM, PLASTIC, FBGA-73Reach Compliance Code:compliant
风险等级:5.79Is Samacsys:N
具有ADC:YES其他特性:ALSO OPERATES AT 1.8V MINIMUM SUPPLY
地址总线宽度:16位大小:8
最大时钟频率:12 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:8
JESD-30 代码:S-PBGA-B73JESD-609代码:e0
长度:9 mmI/O 线路数量:51
端子数量:73最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装形状:SQUARE封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
ROM可编程性:MROM座面最大高度:1.38 mm
速度:12 MHz最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:MOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:9 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

UPD780021AF1-XXX-CN3 数据手册

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DATA SHEET  
µPD780021A, 780M02O2SAI,N7T8E0G0R2A3TAE,D78C0IR0C2U4AIT  
780021AY, 780022AY, 780023AY, 780024AY  
8-BIT SINGLE-CHIP MICROCONTROLLERS  
DESCRIPTION  
The µPD780021A, 780022A, 780023A, and 780024A are members of the µPD780024A Subseries of the 78K/0  
Series. Only selected functions of the existing µPD78054 Subseries are provided, and the serial interface is enhanced.  
The µPD780021AY, 780022AY, 780023AY, and 780024AY are the µPD780024A Subseries with a multimaster  
supporting I2C bus interface, which makes them suitable for AV equipment.  
Flash memory versions, the µPD78F0034A, 78F0034B, 78F0034AY, and 78F0034BY, that can operate in the same  
power supply voltage range as the mask ROM versions, and various development tools, are also available.  
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before  
designing.  
µPD780024A, 780034A, 780024AY, 780034AY  
Subseries User’s Manual:  
U14046E  
U12326E  
78K/0 Series Instructions User’s Manual:  
FEATURES  
Internal ROM and RAM  
Item Program Memory  
(Internal ROM)  
Data Memory  
(Internal High-Speed RAM)  
Package  
Part Number  
µPD780021A, 780021AY  
µPD780022A, 780022AY  
8 KB  
512 bytes  
• 64-pin plastic SDIP (19.05 mm (750))  
16 KB  
• 64-pin plastic QFP (14 x 14)  
• 64-pin plastic LQFP (14 x 14)  
µPD780023A, 780023AY  
µPD780024A, 780024AY  
24 KB  
32 KB  
1024 bytes  
• 64-pin plastic TQFP (12 x 12)  
• 64-pin plastic LQFP (10 x 10)  
• 73-pin plastic FBGA (9 x 9)  
External memory expansion space: 64 KB  
Minimum instruction execution time  
• Expanded-specification products of µPD780021A, 780022A, 780023A, 780024A: 0.166 µs (fX = 12 MHz, VDD  
= 4.5 to 5.5 V)  
µPD780021AY, 780022AY, 780023AY, 780024AY and conventional products of µPD780021A, 780022A,  
780023A, 780024A: 0.238 µs (fX = 8.38 MHz, VDD = 4.0 to 5.5 V)  
I/O ports: 51 (N-ch open-drain (5 V withstanding voltage): 4)  
8-bit resolution A/D converter: 8 channels (AVDD = 1.8 to 5.5 V)  
Serial interface: 3 channels  
µPD780021A, 780022A, 780023A, 780024A: UART mode, 3-wire serial I/O mode (2 channels)  
µPD780021AY, 780022AY, 780023AY, 780024AY: UART mode, 3-wire serial I/O mode, I2C bus mode  
Timer: 5 channels  
Power supply voltage: VDD = 1.8 to 5.5 V  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all products and/or types are available in every country. Please check with an NEC Electronics  
sales representative for availability and additional information.  
Document No. U14042EJ4V0DS00 (4th edition)  
Date Published December 2002 N CP(K)  
Printed in Japan  
The mark  
shows major revised points.  
©

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