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UPD780021AYCW-XXX PDF预览

UPD780021AYCW-XXX

更新时间: 2024-11-21 14:31:31
品牌 Logo 应用领域
瑞萨 - RENESAS 时钟光电二极管外围集成电路
页数 文件大小 规格书
96页 723K
描述
8-BIT, MROM, 8.38MHz, MICROCONTROLLER, PDIP64, 0.750 INCH, PLASTIC, SDIP-64

UPD780021AYCW-XXX 技术参数

是否无铅:含铅生命周期:Obsolete
零件包装代码:DIP包装说明:SDIP,
针数:64Reach Compliance Code:unknown
HTS代码:8542.31.00.01风险等级:5.72
Is Samacsys:N具有ADC:YES
其他特性:ALSO OPERATES AT 1.8V MINIMUM SUPPLY地址总线宽度:16
位大小:8最大时钟频率:8.38 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:8JESD-30 代码:R-PDIP-T64
JESD-609代码:e0长度:58 mm
I/O 线路数量:51端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:SDIP封装形状:RECTANGULAR
封装形式:IN-LINE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not QualifiedROM可编程性:MROM
座面最大高度:5.08 mm速度:8.38 MHz
最大供电电压:5.5 V最小供电电压:4 V
标称供电电压:5 V表面贴装:NO
技术:MOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:THROUGH-HOLE
端子节距:1.778 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:19.05 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

UPD780021AYCW-XXX 数据手册

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DATA SHEET  
µPD780021A, 780M02O2SAI,N7T8E0G0R2A3TAE,D78C0IR0C2U4AIT  
780021AY, 780022AY, 780023AY, 780024AY  
8-BIT SINGLE-CHIP MICROCONTROLLERS  
DESCRIPTION  
The µPD780021A, 780022A, 780023A, and 780024A are members of the µPD780024A Subseries of the 78K/0  
Series. Only selected functions of the existing µPD78054 Subseries are provided, and the serial interface is enhanced.  
The µPD780021AY, 780022AY, 780023AY, and 780024AY are the µPD780024A Subseries with a multimaster  
supporting I2C bus interface, which makes them suitable for AV equipment.  
Flash memory versions, the µPD78F0034A, 78F0034B, 78F0034AY, and 78F0034BY, that can operate in the same  
power supply voltage range as the mask ROM versions, and various development tools, are also available.  
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before  
designing.  
µPD780024A, 780034A, 780024AY, 780034AY  
Subseries User’s Manual:  
U14046E  
U12326E  
78K/0 Series Instructions User’s Manual:  
FEATURES  
Internal ROM and RAM  
Item Program Memory  
(Internal ROM)  
Data Memory  
(Internal High-Speed RAM)  
Package  
Part Number  
µPD780021A, 780021AY  
µPD780022A, 780022AY  
8 KB  
512 bytes  
• 64-pin plastic SDIP (19.05 mm (750))  
16 KB  
• 64-pin plastic QFP (14 x 14)  
• 64-pin plastic LQFP (14 x 14)  
µPD780023A, 780023AY  
µPD780024A, 780024AY  
24 KB  
32 KB  
1024 bytes  
• 64-pin plastic TQFP (12 x 12)  
• 64-pin plastic LQFP (10 x 10)  
• 73-pin plastic FBGA (9 x 9)  
External memory expansion space: 64 KB  
Minimum instruction execution time  
• Expanded-specification products of µPD780021A, 780022A, 780023A, 780024A: 0.166 µs (fX = 12 MHz, VDD  
= 4.5 to 5.5 V)  
µPD780021AY, 780022AY, 780023AY, 780024AY and conventional products of µPD780021A, 780022A,  
780023A, 780024A: 0.238 µs (fX = 8.38 MHz, VDD = 4.0 to 5.5 V)  
I/O ports: 51 (N-ch open-drain (5 V withstanding voltage): 4)  
8-bit resolution A/D converter: 8 channels (AVDD = 1.8 to 5.5 V)  
Serial interface: 3 channels  
µPD780021A, 780022A, 780023A, 780024A: UART mode, 3-wire serial I/O mode (2 channels)  
µPD780021AY, 780022AY, 780023AY, 780024AY: UART mode, 3-wire serial I/O mode, I2C bus mode  
Timer: 5 channels  
Power supply voltage: VDD = 1.8 to 5.5 V  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all products and/or types are available in every country. Please check with an NEC Electronics  
sales representative for availability and additional information.  
Document No. U14042EJ4V0DS00 (4th edition)  
Date Published December 2002 N CP(K)  
Printed in Japan  
The mark  
shows major revised points.  
©

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