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UPD780021AYGB(A)-XXX-8EU PDF预览

UPD780021AYGB(A)-XXX-8EU

更新时间: 2024-11-21 14:45:27
品牌 Logo 应用领域
瑞萨 - RENESAS 时钟外围集成电路
页数 文件大小 规格书
80页 733K
描述
8-BIT, MROM, 8.38MHz, MICROCONTROLLER, PQFP64, 10 X 10 MM, PLASTIC, LQFP-64

UPD780021AYGB(A)-XXX-8EU 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:QFP
包装说明:10 X 10 MM, PLASTIC, LQFP-64针数:64
Reach Compliance Code:compliantHTS代码:8542.31.00.01
风险等级:5.3Is Samacsys:N
具有ADC:YES其他特性:CAN ALSO OPERATE AT 1.8V MIN SUPPLY
地址总线宽度:16位大小:8
CPU系列:UPD78K0最大时钟频率:8.38 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:8JESD-30 代码:S-PQFP-G64
JESD-609代码:e0长度:10 mm
I/O 线路数量:51端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP64,.47SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):235电源:2/5 V
认证状态:Not QualifiedRAM(字节):512
ROM(单词):8192ROM可编程性:MROM
筛选级别:AEC-Q100座面最大高度:1.6 mm
速度:8.38 MHz子类别:Microcontrollers
最大压摆率:19 mA最大供电电压:5.5 V
最小供电电压:4 V标称供电电压:5 V
表面贴装:YES技术:MOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:10 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

UPD780021AYGB(A)-XXX-8EU 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD780021A(A), 780022A(A), 780023A(A), 780024A(A)  
780021AY(A), 780022AY(A), 780023AY(A), 780024AY(A)  
8-BIT SINGLE-CHIP MICROCONTROLLERS  
DESCRIPTION  
The µPD780021A(A), 780022A(A), 780023A(A), 780024A(A), 780021AY(A), 780022AY(A), 780023AY(A) and  
780024AY(A) are products to which a quality assurance program more stringent than that used for the µPD780021A,  
780022A, 780023A, 780024A, 780021AY, 780022AY, 780023AY and 780024AY (standard models) is applied (NEC  
classifies these products as “special” quality grade models).  
The µPD780021A(A), 780022A(A), 780023A(A), and 780024A(A) are members of the µPD780024A Subseries of  
the 78K/0 Series. Only selected functions of the existing µPD78054 Subseries are provided, and the serial interface  
is enhanced.  
The µPD780021AY(A), 780022AY(A), 780023AY(A), and 780024AY(A) are the µPD780024A Subseries with a  
multimaster supporting I2C bus interface, which makes them suitable for AV equipment.  
Flash memory versions, the µPD78F0034A and 78F0034AY, that can operate in the same power supply voltage  
range as the mask ROM versions, and various development tools, are also available.  
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before  
designing.  
µPD780024A, 780034A, 780024AY, 780034AY  
Subseries User’s Manual:  
U14046E  
U12326E  
78K/0 Series User’s Manual Instructions:  
FEATURES  
Internal ROM and RAM  
Item Program Memory  
(Internal ROM)  
Data Memory  
(Internal High-Speed RAM)  
Package  
Part Number  
µPD780021A(A), 780021AY(A)  
µPD780022A(A), 780022AY(A)  
µPD780023A(A), 780023AY(A)  
µPD780024A(A), 780024AY(A)  
8 KB  
16 KB  
24 KB  
32 KB  
512 bytes  
• 64-pin plastic SDIP (19.05 mm (750))  
• 64-pin plastic QFP (14 × 14)  
1024 bytes  
• 64-pin plastic TQFP (12 × 12)  
• 64-pin plastic LQFP (10 × 10)  
External memory expansion space: 64 KB  
Minimum instruction execution time  
µPD780021A(A), 780022A(A), 780023A(A), 780024A(A): 0.166 µs (fX = 12 MHz, VDD = 4.5 to 5.5 V)  
µPD780021AY(A), 780022AY(A), 780023AY(A), 780024AY(A): 0.24 µs (fX = 8.38 MHz, VDD = 4.0 to 5.5 V)  
I/O ports: 51 (N-ch open-drain (5 V withstanding voltage): 4)  
8-bit resolution A/D converter: 8 channels (AVDD = 1.8 to 5.5 V)  
Serial interface: 3 channels  
µPD780021A(A), 780022A(A), 780023A(A), 780024A(A): UART mode, 3-wire serial I/O mode (2 channels)  
µPD780021AY(A), 780022AY(A), 780023AY(A), 780024AY(A): UART mode, 3-wire serial I/O mode, I2C bus mode  
Timer: 5 channels  
Power supply voltage: VDD = 1.8 to 5.5 V  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No. U15131EJ2V0DS00 (2nd edition)  
Date Published April 2002 N CP(K)  
Printed in Japan  
The mark  
shows major revised points.  
2000  
©

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