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UPD72107 PDF预览

UPD72107

更新时间: 2024-11-05 22:52:35
品牌 Logo 应用领域
日电电子 - NEC 控制器
页数 文件大小 规格书
32页 180K
描述
LAP-B CONTROLLER(Link Access Procedure Balanced mode)

UPD72107 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD72107  
LAP-B CONTROLLER  
Link Access Procedure Balanced mode  
The µPD72107 is an LSI that supports LAP-B protocol specified by the ITU-T recommended X.25 on a single  
chip.  
FEATURES  
• Memory-based interface  
Memory-based command  
Memory-based status  
• Complied with ITU-T recommended X.25 (LAP-B84  
edition)  
HDLC frame control  
Memory-based transmit/receive data  
• MAX.4 Mbps serial transfer rate  
• NRZ, NRZI coding  
Sequence control  
Flow control  
• ITU-T recommended X.75 supported  
• TTC standard JT-T90 supported  
• Optional functions  
Option frame  
Global address frame  
Error check deletion frame  
• Powerful test functions  
Data loopback function  
Loopback test link function  
Frame trace function  
• Abundant statistical information  
• Detailed mode setting function  
• Modem control function  
• On-chip DMAC (Direct Memory Access Controller)  
24-bit address  
Byte/word transfer enabled (switch with external pin)  
ORDERING INFORMATION  
Part Number  
µPD72107CW  
µPD72107GC-3B9  
µPD72107L  
Package  
64-pin plastic shrink DIP (750 mils)  
80-pin plastic QFP (14 x 14 mm)  
68-pin plastic QFJ (950 x 950 mils)  
The information in this document is subject to change without notice.  
Document No. S12962EJ5V0DS00 (5th edition)  
Date Published October 1998 N CP(K)  
Printed in Japan  
1998  
©

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