Datasheet > UPD4481161GF-A85-A

UPD4481161GF-A85-A

更新时间： 2024-11-25 19:42:59

品牌	Logo	应用领域
日电电子 - NEC		ISM频段静态存储器内存集成电路
页数	文件大小	规格书
28页	326K
描述
ZBT SRAM, 512KX16, 8.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

UPD4481161GF-A85-A 技术参数

生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LQFP,	针数：	100
Reach Compliance Code：	unknown	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	风险等级：	5.8
最长访问时间：	8.5 ns	其他特性：	FLOW-THROUGH ARCHITECTURE
JESD-30 代码：	R-PQFP-G100	JESD-609代码：	e6
长度：	20 mm	内存密度：	8388608 bit
内存集成电路类型：	ZBT SRAM	内存宽度：	16
功能数量：	1	端子数量：	100
字数：	524288 words	字数代码：	512000
工作模式：	SYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	512KX16
封装主体材料：	PLASTIC/EPOXY	封装代码：	LQFP
封装形状：	RECTANGULAR	封装形式：	FLATPACK, LOW PROFILE
并行/串行：	PARALLEL	峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified	座面最大高度：	1.7 mm
最大供电电压 (Vsup)：	3.465 V	最小供电电压 (Vsup)：	3.135 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	TIN BISMUTH	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	14 mm
Base Number Matches：	1

UPD4481161GF-A85-A 数据手册

浏览型号UPD4481161GF-A85-A的Datasheet PDF文件第2页

浏览型号UPD4481161GF-A85-A的Datasheet PDF文件第3页

浏览型号UPD4481161GF-A85-A的Datasheet PDF文件第4页

浏览型号UPD4481161GF-A85-A的Datasheet PDF文件第5页

浏览型号UPD4481161GF-A85-A的Datasheet PDF文件第6页

DATA SHEET

MOS INTEGRATED CIRCUIT

PD4481161, 4481181, 4481321, 4481361

8M-BIT ZEROSB^TMSRAM

FLOW THROUGH OPERATION

Description

The µPD4481161 is a 524,288-word by 16-bit, the µPD4481181 is a 524,288-word by 18-bit, the µPD4481321 is a

262,144-word by 32-bit and the µPD4481361 is a 262,144-word by 36-bit ZEROSB static RAM fabricated with

advanced CMOS technology using full CMOS six-transistor memory cell.

The µPD4481161, µPD4481181, µPD4481321 and µPD4481361 are optimized to eliminate dead cycles for read to

write, or write to read transitions. These ZEROSB static RAMs integrate unique synchronous peripheral circuitry, 2-bit

burst counter and output buffer as well as SRAM core. All input registers are controlled by a positive edge of the

single clock input (CLK).

The µPD4481161, µPD4481181, µPD4481321 and µPD4481361 are suitable for applications which require

synchronous operation, high speed, low voltage, high density and wide bit configuration, such as buffer memory.

ZZ has to be set LOW at the normal operation. When ZZ is set HIGH, the SRAM enters Power Down State

(“Sleep”). In the “Sleep” state, the SRAM internal state is preserved. When ZZ is set LOW again, the SRAM resumes

normal operation.

The µPD4481161, µPD4481181, µPD4481321 and µPD4481361 are packaged in 100-pin PLASTIC LQFP with a

1.4 mm package thickness for high density and low capacitive loading.

Features

• Low voltage core supply : V_DD= 3.3 ± 0.165 V (-A65, -A75, -A85, -A65Y, -A75Y, -A85Y)

V_DD= 2.5 ± 0.125 V (-C75, -C85, -C75Y, -C85Y)

• Synchronous operation

• Operating temperature : T_A= 0 to 70 °C (-A65, -A75, -A85, -C75, -C85)

T_A= −40 to +85 °C (-A65Y, -A75Y, -A85Y, -C75Y, -C85Y)

• 100 percent bus utilization

• Internally self-timed write control

• Burst read / write : Interleaved burst and linear burst sequence

• Fully registered inputs and outputs for flow through operation

• All registers triggered off positive clock edge

• 3.3V or 2.5V LVTTL Compatible : All inputs and outputs

• Fast clock access time : 6.5 ns (133 MHz), 7.5 ns (117 MHz), 8.5 ns (100 MHz)

• Asynchronous output enable : /G

• Burst sequence selectable : MODE

• Sleep mode : ZZ (ZZ = Open or Low : Normal operation)

• Separate byte write enable : /BW1 to /BW4 (µPD4481321 and µPD4481361)

/BW1 and /BW2 (µPD4481161 and µPD4481181)

• Three chip enables for easy depth expansion

• Common I/O using three state outputs

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all products and/or types are available in every country. Please check with an NEC Electronics

sales representative for availability and additional information.

Document No. M15561EJ3V0DS00 (3rd edition)

The mark shows major revised points.

Date Published December 2002 NS CP(K)

Printed in Japan

2001

12 3 4 5 6 7...28

中文翻译

下载PDF

与UPD4481161GF-A85-A相关器件

型号	品牌	获取价格	描述	数据表
UPD4481161GF-A85Y	NEC	获取价格	ZBT SRAM, 512KX16, 8.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4481161GF-A85Y-A	NEC	获取价格	暂无描述
UPD4481161GF-C75	NEC	获取价格	8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
UPD4481161GF-C75-A	NEC	获取价格	ZBT SRAM, 512KX16, 7.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4481161GF-C75Y	NEC	获取价格	ZBT SRAM, 512KX16, 7.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4481161GF-C75Y-A	NEC	获取价格	ZBT SRAM, 512KX16, 7.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4481161GF-C85	NEC	获取价格	8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
UPD4481161GF-C85Y	NEC	获取价格	ZBT SRAM, 512KX16, 8.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4481161GF-C85Y-A	NEC	获取价格	ZBT SRAM, 512KX16, 8.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, LQFP-100
UPD4481162	NEC	获取价格	8M-BIT ZEROSB SRAM PIPELINED OPERATION

与UPD4481161GF-A85-A相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

40
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

32
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

60
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

56

产品中心

服务支持

精选活动

关于我们

帮助中心

UPD4481161GF-A85-A

UPD4481161GF-A85-A 技术参数

UPD4481161GF-A85-A 数据手册

与UPD4481161GF-A85-A相关器件

与UPD4481161GF-A85-A相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

UPD4481161GF-A85-A

UPD4481161GF-A85-A 技术参数

UPD4481161GF-A85-A 数据手册

与UPD4481161GF-A85-A相关器件

与UPD4481161GF-A85-A相关文章

您还可以找

您在本页遇到什么问题？