UPA1572B

更新时间： 2024-10-29 22:34:39

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描述
N-CHANNEL POWER MOS FET ARRAY SWITCHING INDUSTRIAL USE

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中文翻译

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UPA1572B 数据手册

DATA SHEET

Compound Field Effect Power Transistor

µPA1572B

N-CHANNEL POWER MOS FET ARRAY

SWITCHING

INDUSTRIAL USE

DESCRIPTION

PACKAGE DIMENSIONS

The µPA1572B is N-channel Power MOS FET Array

that built in 4 circuits designed for solenoid, motor and

lamp driver.

in millimeters

4.0

26.8 MAX.

FEATURES

•

Full Mold Package with 4 Circuits

4 V driving is possible

Low On-state Resistance

R^DS(on)= 0.6 Ω MAX. (VGS = 10 V, ID = 1 A)

R^DS(on)= 0.8 Ω MAX. (VGS = 4 V, ID = 1 A)

Low Input Capacitance Ciss = 110 pF TYP.

1.4

0.5±0.1

2.54

1.4 0.6±0.1

•

1 2 3 4 5 6 7 8 910

ORDERING INFORMATION

Type Number

Package

CONNECTION DIAGRAM

µPA1572BH

10Pin SIP

ELECTRODE CONNECTION

2, 4, 6, 8 : Gate

ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)

±20

Drain to Source Voltage (VGS = 0) VDSS

3, 5, 7, 9 : Drain

Gate to Source Voltage (V^DS= 0)

Drain Current (DC)

VGSS (AC)

1, 10

: Source

I^{D (DS)}

±2.0 A/unit

Drain Current (pulse)

I^{D (pulse)}*1 ±6.0 A/unit

Total Power Dissipation

Channel Temperature

Storage Tempreature

P^T1*2

P^T2*3

T^CH

3.0

150 °C

T^stg

−55 to +150°C

Single Avalanche Current

Single Avalanche Energy

I^AS*4

E^AS*4

5.0

0.1 mJ

*1 PW ≤ 10 µs, Duty Cycle ≤ 1 % *2 4 Circuits TC = 25 °C

*3 4 Circuits T^A= 25 °C *4 Starting TCH = 25 °C, VDD = 30 V, VGS = 20 V → 0, RG = 25 Ω, L = 100 µH

Build-in Gate Diodes are for protection from static electricity in handing.

In case high voltage over V^GSsis applied, please append gate protection circuits.

The information in this document is subject to change without notice.

Document No. G11177EJ1V0DS00 (1st edition)

Date Published May 1996 P

Printed in Japan

1996

12 3 4 5 6 7 8

中文翻译

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