TSS400-S1
µ
POWER PROGRAMMABLE HIGH-PRECISION
SENSOR SIGNAL PROCESSOR
SLMS001 – D4071, JANUARY 1993
description (continued)
The TSS400-S1 is designed to meet a wide variety of sensor systems applications including those that require
short time-to-market and rapid and/or frequent programming updates. Since the TSS400-S1 does not require
mask programming, it can be purchased in any quantity. Some typical applications include:
•
measurements of temperature, pressure, acceleration, gas content, magnetic field, relative humidity,
speed, direction, and volume
•
•
•
measurements requiring calculation, control, and/or warning functions
measurements where temperature compensation is required for accuracy
measurements where software calibration and linearization is desirable
These sensor systems can be found in many types of applications including home appliances, industrial control
subsystems, HVAC systems and instrumentation, portable instrumentation, consumer products, automotive
products, or anywhere precise (12-bit), ultra-low power (12 µA – 15 µA, TYP), intelligent A/D conversion is
essential.
TheTSS400-S1isavailableintwotemperatureranges. TheTSS400CFN-S1ischaracterizedforoperationfrom
0°C to 70°C. The TSS400AFN-S1 is characterized for operation from –40°C to 125°C.
initialization and power up
Initialization is started by hardware in two ways:
•
•
Power up: The voltage V
oscillator has started operation. This may take from 1 to 6 seconds.
is switched on (cold start). The CPU starts to work at PC 000 after the internal
DD
INITN pin: If the INITN pin is held low (switched to ground) for more than 10 µs (when this occurs during
program execution it is called a warm start). The CPU starts operation at PC 000 when the INITN pin is
released to V
potential.
DD
Table 1 lists the TSS400-S1 register contents after a power up or an INITN pin initialization.
Table 1. Register Contents
POWER UP
(COLD START)
INITN PIN
(WARM START)
REGISTER
000
undefined
reset to 0
reset to 0
undefined
0
000
Program Counter (PC)
Status bits POS, NEG, and ZERO
unchanged
unchanged
reset to 0
unchanged
unchanged
switched off
unchanged
level 0
†
RAM contents
Digit Latches (DLn)
K-Line’s Latches Contents
Timers
ADC Voltage SV
switched off
undefined
level 0
DD
LCD Segment Latches
Subroutine Stack
†
Despite the RAM remaining unchanged during a warm start, the memory
addressed when INITN is activated may be destroyed by a write cycle.
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