TSC21020E
Radiation Tolerant 32/40–Bit IEEE Floating–Point
DSP Microprocessor
Introduction
TEMIC Semiconductors is manufacturing a radiation The product is pin and code compatible with ADI
tolerant version of the Analog Devices ADSP–21020 product, making system development straight forward
32/40–Bit Floating–Point DSP.
and cost effective, using existing development tools and
algorithms.
Features
D Superscalar IEEE Floating-Point-Processor
D Off-Chip Harvard Architecture Maximizes Signal Processing
Performance
D Two Off-Chip Memory Transfers in Parallel with Instruction
Fetch and Single-Cycle Multiply & ALU Operations
D Multiply with Add & Subtract for FFT Butterfly
Computation
D 40 ns, 25 MIPS Instruction Rate, Single-Cycle Execution
D 75 MFLOPS Peak, 50 MFLOPS Sustained Performance
D 1024-Point Complex FFT Benchmark : 0.78 ms
D Divide (y/x) : 240 ns
D Efficient Program Sequencing with Zero-Overhead
Looping : Single-Cycle Loop Setup
D Single-Cycle Register File Context Switch
D 15 (or 25) ns External RAM Access Time for
Zero-Wait-State, 40 ns Instruction Execution
D IEEE JTAG Standard 1149.1 Test Access Port and On-Chip
Emulation Circuitry
D Inverse Square Root (1/√x) : 360 ns
D 32-Bit Single-Precision and 40-Bit Extended-Precision
IEEE Floating-Point Data Formats
D 32-Bit Fixed-Point Formats, Integer and Fractional, with
80-Bit Accumulators
D IEEE Exception Handling with Interrupt on Exception
D Three Independent Computation Units : Multiplier, ALU,
and Barrel Shifter
D 223 CPGA package for breadboarding
D 256 Multi layer quad flat pack, flat leads, for flight models
D Full compatible with Analog Devices ADSP-21020
D Latch up better than 55 MeV
D Dual Data Address Generators with Indirect, Immediate,
D Total dose better than 50 Krad (Si)
Modulo, and Bit Reverse Addressing Modes
D SEU immunity better than 30 MeV/mg/cm2
– Design using patent from INPG–CNRS Denis BESSOT / Raoul VELAZCO
– Product licensed from Analog Devices Inc.
MHS
1
Rev. D (05 Mai 98)