TRF3762

更新时间： 2024-10-29 03:26:31

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
33页	1083K
描述
INTEGER-N PLL WITH INTEGRATED VCO

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TRF3762 数据手册

TRF3762

www.ti.com ....................................................................................................................................................... SLWS205A–JANUARY 2008–REVISED MAY 2008

INTEGER-N PLL WITH INTEGRATED VCO

FEATURES

(See Note A)

•

Fully Integrated VCO

•

Low Phase Noise: –137dBc/Hz

at 600kHz, f_VCOof 1.9GHz

1000 pF

•

Low Noise Floor: –158dBc/Hz at 10MHz Offset

Integer-N PLL

Input Reference Frequency range:

10MHz to 104MHz

40 39 38 37 36 35 34 33 32 31

PD_OUTBUF

CHIP_EN

CLOCK

GND

2.37 kΩ

AVDD_BIAS

RBIAS1

•

VCO Frequency Divided by 2-4 Output

Output Buffer Enable Pin

DATA

GND

STROBE

DGND

VCTRL_IN

AVDD_VCO

AVDD_BUF

TRF3762

(TOP VIEW)

Programmable Charge Pump Current

Hardware and Software Power Down

3-Wire Serial Interface

DGND

DVDD1

AVDD_CAPARRAY

GND

AVDD_PRES

GND

AVDD

11 12 13 14 15 16 17 18 19 20

Single Supply: 4.5V to 5.25V Operation

APPLICATIONS

•

Wireless Infrastructure

4.75 kΩ

–

WCDMA, CDMA, GSM

Wideband Transceivers

Wireless Local Loop

RFID Transceivers

Clock generation

1000 pF

120 Ω

10 pF

LOAD

A. See the Application Information section for

Loop Filter Design procedures.

IF LO generation

AVAILABLE DEVICE OPTIONS

Div by 1

Div by 2

Div by 4

PART NUMBER

Fstart

Fstop

Fstart

Fstop

Fstart

Fstop

TRF3762-E

1805

1936

902.5

968

451.25

484

DESCRIPTION

TRF3762-E is a high performance, highly integrated frequency synthesizer, optimized for high performance

applications. The device includes a low-noise, voltage-controlled oscillator (VCO) and an integer-N PLL.

TRF3762-E integrates divide-by 1, 2, or 4 options for a more flexible output frequency range. The device is

controlled through a 3-wire serial-programming-interface (SPI) interface. For power sensitive applications, the

device can be powered down by the SPI interface or externally via CHIP_EN (pin 2).

The TRF3762-E offers the ability to reduce lock time when compared to the TRF3761-E device. The TRF3762-E

was designed so that the external loop filter is the determining factor in the setting of lock time. Typical lock times

for the TRF3762-E are less than 350µs (depending on the loop filter circuit). All other features of the TRF3762-E

are identical to the TRF3761-E including superior phase noise and spurious output as well as the programming

model and register mapping. The TRF3762-E is pin-to-pin compatible to the TRF3761-E.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...33

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与TRF3762相关器件

型号	品牌	获取价格	描述	数据表
TRF3762-E	TI	获取价格	INTEGER-N PLL WITH INTEGRATED VCO
TRF3762-EIRHAR	TI	获取价格	INTEGER-N PLL WITH INTEGRATED VCO
TRF3762-EIRHARG4	TI	获取价格	TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PQCC40, GREEN, PLASTIC, MO-220VJJD-2, QFN-40
TRF3762-EIRHAT	TI	获取价格	INTEGER-N PLL WITH INTEGRATED VCO
TRF3765	TI	获取价格	Integer-N/Fractional-N PLL with Integrated VCO
TRF3765_15	TI	获取价格	Integer-N/Fractional-N PLL With Integrated VCO
TRF3765IRHBR	TI	获取价格	Integer-N/Fractional-N PLL with Integrated VCO
TRF3765IRHBT	TI	获取价格	Integer-N/Fractional-N PLL with Integrated VCO
TRF37A32	TI	获取价格	TRF37x32 Dual Down Converter Mixer With Integrated IF AMP
TRF37A32_15	TI	获取价格	TRF37x32 Dual Down Converter Mixer With Integrated IF AMP

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