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TRF2056PWR PDF预览

TRF2056PWR

更新时间： 2024-10-28 20:08:35
品牌 Logo 应用领域
德州仪器 - TI 光电二极管
页数 文件大小 规格书
24页 320K
描述
Low-Voltage 1.2-GHz Fractional-N/Integer-N Synthesizer 20-TSSOP 0 to 70

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中文翻译

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TRF2056PWR 技术参数

是否无铅： 含铅生命周期：Obsolete
零件包装代码：SOIC包装说明：TSSOP, TSSOP20,.25
针数：20Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.7
模拟集成电路 - 其他类型：PLL FREQUENCY SYNTHESIZERJESD-30 代码：R-PDSO-G20
长度：6.5 mm功能数量：1
端子数量：20最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP20,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.9 V最小供电电压 (Vsup)：3.3 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
宽度：4.4 mmBase Number Matches：1

TRF2056PWR 数据手册

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S YN TH E SI ZE R  
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SLWS111– NOVEMBER 2000  
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1.2-GHz Operation  
Two Operating Modes:  
– Philips SA7025 Emulation Mode  
Terminal-for-Terminal and Programming  
Compatible  
– Extended Performance Mode (EPM)  
PW PACKAGE  
(TOP VIEW)  
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CLOCK  
DATA  
STROBE  
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DD  
TSETUP  
LOCK/TEST  
RF  
V
SS  
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Dual RF-IF Phase-Locked Loops  
Fractional-N or Integer-N Operation  
RFIN  
RFIN  
RN  
V
DDA  
V
PHP  
PHI  
V
SSA  
PHA  
CCP  
Programmable EPM Fractional  
Modulus of 1–16  
REFIN  
RA  
AUXIN  
Normal, Speed-Up, and Fractional  
Compensation Charge Pumps  
Low-Power Consumption  
description  
The TRF2056 device is a low-voltage, low-power consumption 1.2-GHz fractional-N/integer-N frequency  
synthesizer component for wireless applications. Fractional-N division and an integral speed-up charge pump  
achieve rapid channel switching. Two operating modes are available: 1) SA7025 emulation mode in which the  
device emulates the Philips SA7025 fractional-N synthesizer and 2) extended performance mode (EPM), which  
provides additional features, including fractional accumulator modulos from 1 to 16 (compared to only 5 or 8  
for the SA7025 synthesizer).  
The TRF2056 device provides external loop filters and all functions necessary for voltage-controlled oscillator  
(VCO) control in a dual phase-locked loop (PLL) frequency synthesizer system. A main channel is provided for  
radio frequency (RF) channels and an auxiliary channel for intermediate frequency (IF) channels. The  
current-output charge pumps directly drive passive resistance-capacitance (RC) filter networks to generate  
VCO control voltages. Rapid main-channel frequency switching is achieved with a charge pump arrangement  
that increases the current drive and alters the loop-filter frequency response during the speed-up mode portion  
of the switching interval.  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...24

中文翻译

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