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TPIC6B259DW PDF预览

TPIC6B259DW

更新时间： 2024-11-30 22:28:15
品牌 Logo 应用领域
德州仪器 - TI 锁存器逻辑集成电路光电二极管双倍数据速率
页数 文件大小 规格书
11页 162K
描述
POWER LOGIC 8-BIT ADDRESSABLE LATCH

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TPIC6B259DW 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：SOIC-20针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：0.65Is Samacsys：N
系列：6BJESD-30 代码：R-PDSO-G20
JESD-609代码：e4长度：12.8 mm
逻辑集成电路类型：LOGIC CIRCUIT湿度敏感等级：1
功能数量：1端子数量：20
最高工作温度：125 °C最低工作温度：-40 °C
输出特性：OPEN-DRAIN输出极性：INVERTING
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TUBE峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：2.65 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
温度等级：AUTOMOTIVE端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.5 mmBase Number Matches：1

TPIC6B259DW 数据手册

 浏览型号TPIC6B259DW的Datasheet PDF文件第2页浏览型号TPIC6B259DW的Datasheet PDF文件第3页浏览型号TPIC6B259DW的Datasheet PDF文件第4页浏览型号TPIC6B259DW的Datasheet PDF文件第5页浏览型号TPIC6B259DW的Datasheet PDF文件第6页浏览型号TPIC6B259DW的Datasheet PDF文件第7页 
TPIC6B259  
POWER LOGIC 8-BIT ADDRESSABLE LATCH  
SLIS030 – APRIL 1994 – REVISED JULY 1995  
Low r  
. . . 5 Ω Typical  
DS(on)  
DW OR N PACKAGE  
(TOP VIEW)  
Avalanche Energy . . . 30 mJ  
Eight Power DMOS-Transistor Outputs of  
150-mA Continuous Current  
NC  
NC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
V
CLR  
CC  
S0  
500-mA Typical Current-Limiting Capability  
Output Clamp Voltage . . . 50 V  
Four Distinct Function Modes  
Low Power Consumption  
D
DRAIN0  
DRAIN1  
DRAIN2  
DRAIN3  
S1  
DRAIN7  
DRAIN6  
15 DRAIN5  
14  
13  
12  
11  
DRAIN4  
G
description  
GND  
S2  
GND  
GND  
This power logic 8-bit addressable latch controls  
open-drain DMOS-transistor outputs and is  
NC – No internal connection  
designed  
for  
general-purpose  
storage  
FUNCTION TABLE  
applications in digital systems. Specific uses  
includeworkingregisters, serial-holdingregisters,  
and decoders or demultiplexers. This is a multi-  
functional device capable of storing single-line  
data in eight addressable latches and 3-to-8  
decoder or demultiplexer with active-low DMOS  
outputs.  
OUTPUT OF  
ADDRESSED  
DRAIN  
EACH  
OTHER  
DRAIN  
INPUTS  
CLR G  
FUNCTION  
D
H
H
L
L
H
L
L
H
Q
Q
Addressable  
Latch  
io  
io  
H
H
X
Q
Q
Memory  
io  
io  
L
L
L
L
H
L
L
H
H
H
8-Line  
Demultiplexer  
Four distinct modes of operation are selectable by  
controlling the clear (CLR) and enable (G) inputs  
as enumerated in the function table. In the  
addressable-latch mode, data at the data-in (D)  
terminal is written into the addressed latch. The  
addressed DMOS-transistor output inverts the  
data input with all unaddressed DMOS-transistor  
outputs remaining in their previous states. In the  
memory mode, all DMOS-transistor outputs  
remain in their previous states and are unaffected  
by the data or address inputs. To eliminate the  
possibility of entering erroneous data in the latch,  
enable G should be held high (inactive) while the  
addresslinesarechanging. Inthe3-to-8decoding  
or demultiplexing mode, the addressed output is  
inverted with respect to the D input and all other  
L
H
X
H
H
Clear  
LATCH SELECTION TABLE  
SELECT INPUTS  
DRAIN  
ADDRESSED  
S2 S1  
S0  
L
L
L
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
0
1
2
3
4
5
6
7
L
H
H
H
H
H = high level, L = low level  
outputs are off. In the clear mode, all outputs are off and unaffected by the address and data inputs. When data  
is low for a given output, the DMOS-transistor output is off. When data is high, the DMOS-transistor output has  
sink-current capability.  
Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-mA continuous  
sink-current capability. Each output provides a 500-mA typical current limit at T = 25°C. The current limit  
C
decreases as the junction temperature increases for additional device protection.  
The TPIC6B259 is characterized for operation over the operating case temperature range of –40°C to 125°C.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

中文翻译

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TPIC6B259DW 替代型号

型号 品牌 替代类型 描述 数据表
TPIC6B259DWRG4 TI

完全替代

 150mA/通道 8 位可寻址锁存器 | DW | 20
TPIC6B259DWG4 TI

完全替代

 150mA/通道 8 位可寻址锁存器 | DW | 20
TPIC6B259DWR TI

完全替代

 8-bit addressable latch with 150mA/ch 20-SOIC -40 to 125

与TPIC6B259DW相关器件

型号 品牌 获取价格 描述 数据表
TPIC6B259DWG4 TI

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 		150mA/通道 8 位可寻址锁存器 | DW | 20
TPIC6B259DWR TI

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 		8-bit addressable latch with 150mA/ch 20-SOIC -40 to 125
TPIC6B259DWRG4 TI

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 		150mA/通道 8 位可寻址锁存器 | DW | 20
TPIC6B259N TI

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 		POWER LOGIC 8-BIT ADDRESSABLE LATCH
TPIC6B273 TI

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 		POWER LOGIC OCTAL D-TYPE LATCH
TPIC6B273DW TI

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 		POWER LOGIC OCTAL D-TYPE LATCH
TPIC6B273DWG4 TI

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 		Eight Power DMOS-Transistor Outputs of 150-mA Continuous Current
TPIC6B273DWR TI

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 		Eight Power DMOS-Transistor Outputs of 150-mA Continuous Current
TPIC6B273DWRG4 TI

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 		Eight Power DMOS-Transistor Outputs of 150-mA Continuous Current
TPIC6B273N TI

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 		POWER LOGIC OCTAL D-TYPE LATCH

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