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TPIC6C595D PDF预览

TPIC6C595D

更新时间： 2024-11-24 22:28:15
品牌 Logo 应用领域
德州仪器 - TI 移位寄存器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
11页 182K
描述
POWER LOGIC 8-BIT SHIFT REGISTER

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中文翻译

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TPIC6C595D 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP, SOP16,.25针数：16
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：0.72
其他特性：PARALLEL OUTPUT IS REGISTERED; UNREGISTERED SERIAL SHIFT RIGHT OUTPUT计数方向：RIGHT
系列：6CJESD-30 代码：R-PDSO-G16
JESD-609代码：e4长度：9.9 mm
负载电容（CL）：30 pF逻辑集成电路类型：SERIAL IN PARALLEL OUT
湿度敏感等级：1位数：8
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-40 °C
输出特性：OPEN-DRAIN输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TUBE
峰值回流温度（摄氏度）：260电源：5 V
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：Shift Registers最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：AUTOMOTIVE端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：3.9 mm
Base Number Matches：1

TPIC6C595D 数据手册

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TPIC6C595  
POWER LOGIC 8-BIT SHIFT REGISTER  
SLIS061A – JULY 1998 – REVISED JULY 1999  
D OR N PACKAGE  
(TOP VIEW)  
Low r  
. . . 7 Ω Typ  
DS(on)  
Avalanche Energy . . . 30 mJ  
Eight Power DMOS Transistor Outputs of  
100-mA Continuous Current  
V
GND  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
CC  
SER IN  
DRAIN0  
DRAIN1  
DRAIN2  
DRAIN3  
CLR  
SRCK  
250-mA Current Limit Capability  
ESD Protection . . . 2500 V  
Output Clamp Voltage . . . 33 V  
Devices Are Cascadable  
DRAIN7  
DRAIN6  
DRAIN5  
11 DRAIN4  
10 RCK  
Low Power Consumption  
G
9
SER OUT  
description  
†
logic symbol  
The TPIC6C595 is a monolithic, medium-voltage,  
low-current power 8-bit shift register designed for  
use in systems that require relatively moderate  
load power such as LEDs. The device contains a  
built-in voltage clamp on the outputs for inductive  
transient protection. Power driver applications  
include relays, solenoids, and other low-current or  
medium-voltage loads.  
8
EN3  
C2  
G
10  
RCK  
SRG8  
7
R
CLR  
15  
SRCK  
C1  
3
2
DRAIN0  
1D  
2
SER IN  
4
5
DRAIN1  
DRAIN2  
DRAIN3  
DRAIN4  
DRAIN5  
DRAIN6  
DRAIN7  
SER OUT  
This device contains an 8-bit serial-in, parallel-out  
shift register that feeds an 8-bit D-type storage  
register. Data transfers through both the shift and  
storage registers on the rising edge of the shift  
register clock (SRCK) and the register clock  
(RCK), respectively. The device transfers data out  
the serial output (SER OUT) port on the rising  
edgeofSRCK. Thestorageregistertransfersdata  
to the output buffer when shift register clear (CLR)  
is high. When CLR is low, the input shift register is  
cleared. When output enable (G) is held high, all  
data in the output buffers is held low and all drain  
6
11  
12  
13  
14  
9
2
†
This symbol is in accordance with ANSI/IEEE Std 91-1984  
and IEC Publication 617-12.  
outputs are off. When G is held low, data from the storage register is transparent to the output buffers. When  
data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor  
outputs have sink-current capability. The SER OUT allows for cascading of the data from the shift register to  
additional devices.  
This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These  
circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C,  
Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated  
voltages to these high-impedance circuits. During storage or handling, the device leads should be shorted together or the device  
should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriated logic voltage level,  
preferably either V  
or ground. Specific guidelines for handling devices of this type are contained in the publication Guidelines for  
CC  
Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

中文翻译

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TPIC6C595D 替代型号

型号 品牌 替代类型 描述 数据表
TPIC6C595DRG4 TI

完全替代

 POWER LOGIC 8-BIT SHIFT REGISTER
TPIC6C595DR TI

完全替代

 POWER LOGIC 8-BIT SHIFT REGISTER
TPIC6C596DRG4 TI

完全替代

 POWER LOGIC 8-BIT SHIFT REGISTER

与TPIC6C595D相关器件

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TPIC6C595DG4 TI

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 		POWER LOGIC 8-BIT SHIFT REGISTER
TPIC6C595DR TI

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 		POWER LOGIC 8-BIT SHIFT REGISTER
TPIC6C595DRG4 TI

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 		POWER LOGIC 8-BIT SHIFT REGISTER
TPIC6C595N TI

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 		POWER LOGIC 8-BIT SHIFT REGISTER
TPIC6C595PW TI

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 		POWER LOGIC 8-BIT SHIFT REGISTER
TPIC6C595PWG4 TI

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 		POWER LOGIC 8-BIT SHIFT REGISTER
TPIC6C595PWR TI

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 		POWER LOGIC 8-BIT SHIFT REGISTER
TPIC6C595PWRG4 TI

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 		POWER LOGIC 8-BIT SHIFT REGISTER
TPIC6C596 TI

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 		POWER LOGIC 8-BIT SHIFT REGISTER
TPIC6C596_05 TI

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 		POWER LOGIC 8-BIT SHIFT REGISTER

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