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TMS320DM8147SCYE2

更新时间： 2024-12-02 11:08:03
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360页 2357K
描述
DaVinci 数字媒体处理器 | CYE | 684 | 0 to 90

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TMS320DM8147SCYE2 数据手册

 浏览型号TMS320DM8147SCYE2的Datasheet PDF文件第2页浏览型号TMS320DM8147SCYE2的Datasheet PDF文件第3页浏览型号TMS320DM8147SCYE2的Datasheet PDF文件第4页浏览型号TMS320DM8147SCYE2的Datasheet PDF文件第5页浏览型号TMS320DM8147SCYE2的Datasheet PDF文件第6页浏览型号TMS320DM8147SCYE2的Datasheet PDF文件第7页 
TMS320DM8148, TMS320DM8147, TMS320DM8146  
www.ti.com  
SPRS647B–MARCH 2011–REVISED SEPTEMBER 2011  
TMS320DM814x DaVinci™  
Digital Media Processors  
Check for Samples: TMS320DM8148, TMS320DM8147, TMS320DM8146  
1 High-Performance System-on-Chip (SoC)  
1.1 Features  
12  
– 32K-Byte L1P RAM/Cache With EDC  
– 32K-Byte L1D RAM/Cache  
• High-Performance DaVinci™ Digital Media  
Processors  
– Up to 1-GHz ARM® Cortex™-A8 RISC MPU  
– Up to 750-MHz C674x™ VLIW DSP  
– Up to 6000/4500 C674x™ MIPS/MFLOPS  
– Fully Software-Compatible with C67x+™,  
C64x+™  
– 256K-Byte L2 Unified Mapped RAM/Caches  
With ECC  
• DSP/EDMA Memory Management Unit  
(DEMMU)  
– Maps C674x DSP and EDMA TC Memory  
Accesses to System Addresses  
• 128K-Bytes On-Chip Memory Controller  
(OCMC) RAM  
• Imaging Subsystem (ISS)  
– Camera Sensor Connection  
• ARM® Cortex™-A8 Core  
– ARMv7 Architecture  
•
In-Order, Dual-Issue, Superscalar  
Microprocessor Core  
•
•
•
NEON™ Multimedia Architecture  
Supports Integer and Floating Point  
Jazelle® RCT Execution Environment  
•
Parallel Connection for Raw (up to 16-Bit)  
and BT.656/BT.1120 (8-/16-bit)  
– Image Sensor Interface (ISIF) for Handling  
Image/Video Data From the Camera Sensor  
– Resizer  
• ARM® Cortex™-A8 Memory Architecture  
– 32K-Byte Instruction and Data Caches  
– 512K-Byte L2 Cache  
– 64K-Byte RAM, 48K-Byte Boot ROM  
• TMS320C674x™ Floating-Point VLIW DSP  
– 64 General-Purpose Registers (32-Bit)  
– Six ALU (32-/40-Bit) Functional Units  
•
•
Resizing Image/Video From 1/16x to 8x  
Generating Two Different Resizing  
Outputs Concurrently  
• Programmable High-Definition Video Image  
Coprocessing (HDVICP v2) Engine  
•
Supports 32-Bit Integer, SP (IEEE Single  
Precision/32-Bit) and DP (IEEE Double  
Precision/64-Bit) Floating Point  
Supports up to Four SP Adds Per Clock  
and Four DP Adds Every Two Clocks  
Supports up to Two Floating-Point (SP or  
DP) Approximate Reciprocal or Square  
Root Operations Per Cycle  
– Encode, Decode, Transcode Operations  
– H.264, MPEG2, VC1, MPEG4, SP/ASP,  
JPEG/MJPEG  
• Media Controller  
– Controls the HDVPSS, HDVICP2, and ISS  
• SGX530 3D Graphics Engine  
– Delivers up to 18 MPoly/sec  
– Universal Scalable Shader Engine  
•
•
– Two Multiply Functional Units  
– Direct3D Mobile, OpenGLES 1.1 and 2.0,  
•
Mixed-Precision IEEE Floating-Point  
Multiply Supported up to:  
OpenVG 1.0, OpenMax API Support  
– Advanced Geometry DMA Driven Operation  
– Programmable HQ Image Anti-Aliasing  
• Endianness  
– ARM/DSP Instructions/Data – Little Endian  
• HD Video Processing Subsystem (HDVPSS)  
– Two 165 MHz HD Video Capture Inputs  
–
–
–
–
2 SP x SP → SP Per Clock  
2 SP x SP → DP Every Two Clocks  
2 SP x DP → DP Every Three Clocks  
2 DP x DP → DP Every Four Clocks  
•
Fixed-Point Multiply Supports Two 32 x  
32 Multiplies, Four 16 x 16-bit Multiplies  
including Complex Multiplies, or Eight 8 x  
8-Bit Multiplies per Clock Cycle  
•
One 16/24-bit Input, Splittable into Dual  
8-bit SD Capture Ports  
• C674x™ Two-Level Memory Architecture  
•
One 8/16/24-bit Input  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCT PREVIEW information concerns products in the formative  
or design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right  
to change or discontinue these products without notice.  
Copyright © 2011, Texas Instruments Incorporated  
 
 
 
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TMS320DM8147SCYE2 替代型号

型号 品牌 替代类型 描述 数据表
TMS320DM8147SCYE1 TI

完全替代

 DaVinci 数字媒体处理器 | CYE | 684 | 0 to 90
AM3874BCYE100 TI

完全替代

 AM387x Sitara ARM Microprocessors (MPUs)

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TMS320DM8148CCYE2 TI

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TMS320DM8148CCYEA0 TI

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 		DaVinci 数字媒体处理器 | CYE | 684
TMS320DM8148SCYE1 TI

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 		DaVinci 数字媒体处理器 | CYE | 684

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