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TMS320DM6437Q PDF预览

TMS320DM6437Q

更新时间: 2024-01-15 09:19:33
品牌 Logo 应用领域
德州仪器 - TI 时钟控制器微控制器微控制器和处理器数字信号处理器
页数 文件大小 规格书
305页 2529K
描述
数字媒体处理器,性能高达 4800MIPS、600MHz 时钟速率、1 个 McASP、2 个 McBSP

TMS320DM6437Q 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:BGA-376针数:376
Reach Compliance Code:compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01Factory Lead Time:6 weeks
风险等级:2.22Is Samacsys:N
其他特性:ALSO REQUIRES 3.3V I/O SUPPLY地址总线宽度:32
桶式移位器:NO位大小:32
边界扫描:YES最大时钟频率:27 MHz
外部数据总线宽度:32格式:FIXED POINT
集成缓存:YES内部总线架构:MULTIPLE
JESD-30 代码:S-PBGA-B376JESD-609代码:e1
长度:23 mm低功率模式:YES
湿度敏感等级:3DMA 通道数量:72
端子数量:376计时器数量:5
片上数据RAM宽度:8片上程序ROM宽度:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HBGA
封装等效代码:BGA376,22X22,40封装形状:SQUARE
封装形式:GRID ARRAY, HEAT SINK/SLUG峰值回流温度(摄氏度):260
电源:1.2,1.8,3.3 V认证状态:Not Qualified
RAM(字数):61440ROM可编程性:MROM
座面最大高度:2.48 mm子类别:Digital Signal Processors
最大供电电压:1.26 V最小供电电压:1.14 V
标称供电电压:1.2 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:23 mm
uPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHERBase Number Matches:1

TMS320DM6437Q 数据手册

 浏览型号TMS320DM6437Q的Datasheet PDF文件第3页浏览型号TMS320DM6437Q的Datasheet PDF文件第4页浏览型号TMS320DM6437Q的Datasheet PDF文件第5页浏览型号TMS320DM6437Q的Datasheet PDF文件第7页浏览型号TMS320DM6437Q的Datasheet PDF文件第8页浏览型号TMS320DM6437Q的Datasheet PDF文件第9页 
TMS320DM6437  
Digital Media Processor  
SPRS345DNOVEMBER 2006REVISED JUNE 2008  
www.ti.com  
Contents  
1
TMS320DM6437 Digital Media Processor........... 1  
6
Peripheral Information and Electrical  
Specifications ......................................... 162  
1.1 Features .............................................. 1  
1.2 Description............................................ 3  
1.3 Functional Block Diagram ............................ 5  
6.1 Parameter Information ............................. 162  
6.2  
Recommended Clock and Control Signal Transition  
Behavior............................................ 163  
Revision History............................................... 7  
2
6.3 Power Supplies .................................... 163  
Device Overview ......................................... 8  
2.1 Device Characteristics................................ 8  
2.2 CPU (DSP Core) Description......................... 9  
2.3 C64x+ CPU.......................................... 12  
2.4 Memory Map Summary ............................. 13  
2.5 Pin Assignments .................................... 17  
2.6 Terminal Functions.................................. 25  
2.7 Device Support ...................................... 70  
6.4  
Enhanced Direct Memory Access (EDMA3)  
Controller........................................... 170  
6.5 Reset............................................... 183  
6.6  
External Clock Input From MXI/CLKIN Pin ........ 192  
6.7 Clock PLLs......................................... 194  
6.8 Interrupts........................................... 200  
6.9 External Memory Interface (EMIF)................. 203  
6.10 Video Processing Sub-System (VPSS) Overview . 211  
6.11 Universal Asynchronous Receiver/Transmitter  
(UART) ............................................. 234  
2.8  
Device and Development-Support Tool  
Nomenclature ....................................... 70  
2.9 Documentation Support ............................. 72  
Device Configurations................................. 73  
3.1 System Module Registers ........................... 73  
3.2 Power Considerations............................... 74  
3.3 Clock Considerations................................ 77  
3.4 Boot Sequence...................................... 80  
3.5 Configurations At Reset ............................. 92  
3.6 Configurations After Reset .......................... 95  
3.7 Multiplexed Pin Configurations...................... 99  
6.12 Inter-Integrated Circuit (I2C) ....................... 237  
6.13 Host-Port Interface (HPI) Peripheral............... 241  
3
6.14 Multichannel Buffered Serial Port (McBSP)........ 246  
6.15 Multichannel Audio Serial Port (McASP0)  
Peripheral .......................................... 256  
6.16 High-End Controller Area Network Controller  
(HECC)............................................. 264  
6.17 Ethernet Media Access Controller (EMAC) ........ 270  
6.18 Management Data Input/Output (MDIO) .......... 277  
6.19 Timers.............................................. 278  
6.20 Peripheral Component Interconnect (PCI)......... 281  
6.21 Pulse Width Modulator (PWM)..................... 287  
6.22 VLYNQ ............................................. 289  
6.23 General-Purpose Input/Output (GPIO)............. 293  
6.24 IEEE 1149.1 JTAG................................. 297  
Mechanical Data....................................... 299  
7.1 Thermal Data for ZWT ............................. 299  
7.1.1 Thermal Data for ZDU............................. 300  
7.1.2 Packaging Information............................. 300  
3.8  
Device Initialization Sequence After Reset ........ 152  
3.9 Debugging Considerations......................... 154  
System Interconnect ................................. 156  
4.1 System Interconnect Block Diagram............... 156  
Device Operating Conditions....................... 158  
4
5
5.1  
Absolute Maximum Ratings Over Operating  
7
Temperature Range (Unless Otherwise Noted) ... 158  
5.2 Recommended Operating Conditions ............. 159  
5.3  
Electrical Characteristics Over Recommended  
Ranges of Supply Voltage and Operating  
Temperature (Unless Otherwise Noted) ........... 160  
6
Contents  
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