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TMS320C6711CGDP167 PDF预览

TMS320C6711CGDP167

更新时间: 2024-11-16 15:54:47
品牌 Logo 应用领域
德州仪器 - TI 时钟外围集成电路
页数 文件大小 规格书
117页 1694K
描述
32-BIT, 166.66MHz, OTHER DSP, PBGA272, 27 X 27 MM, PLASTIC, BGA-272

TMS320C6711CGDP167 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:BGA, BGA272,20X20,50针数:272
Reach Compliance Code:unknownECCN代码:3A001.A.3
HTS代码:8542.31.00.01风险等级:5.67
其他特性:ALSO REQUIRES 3.3V SUPPLY地址总线宽度:22
桶式移位器:NO位大小:32
边界扫描:YES最大时钟频率:166.66 MHz
外部数据总线宽度:32格式:FLOATING POINT
内部总线架构:MULTIPLEJESD-30 代码:S-PBGA-B272
长度:27 mm低功率模式:YES
端子数量:272封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA272,20X20,50
封装形状:SQUARE封装形式:GRID ARRAY
电源:1.2,3.3 V认证状态:Not Qualified
RAM(字数):65536座面最大高度:2.57 mm
子类别:Digital Signal Processors最大供电电压:1.32 V
最小供电电压:1.2 V标称供电电压:1.26 V
表面贴装:YES技术:CMOS
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM宽度:27 mm
uPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHERBase Number Matches:1

TMS320C6711CGDP167 数据手册

 浏览型号TMS320C6711CGDP167的Datasheet PDF文件第2页浏览型号TMS320C6711CGDP167的Datasheet PDF文件第3页浏览型号TMS320C6711CGDP167的Datasheet PDF文件第4页浏览型号TMS320C6711CGDP167的Datasheet PDF文件第5页浏览型号TMS320C6711CGDP167的Datasheet PDF文件第6页浏览型号TMS320C6711CGDP167的Datasheet PDF文件第7页 
ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉꢉ ꢊ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉꢉ ꢋꢊ ꢀ ꢁꢂ ꢃꢄ ꢅꢆ ꢇꢈ ꢉꢉꢆ  
ꢌ ꢍꢎ ꢏꢀ ꢐꢑꢒ ꢓꢔ ꢎꢐ ꢑꢀ ꢕꢐ ꢒꢐ ꢀꢏꢍ ꢂꢐ ꢒ ꢑꢏꢍ ꢔꢖ ꢎ ꢆꢗ ꢂ ꢂꢎ ꢖ ꢂ  
SPRS088E – FEBRUARY 1999 – REVISED DECEMBER 2002  
D
D
Excellent Price/Performance Digital Signal  
D
32-Bit External Memory Interface (EMIF)  
– Glueless Interface to Asynchronous  
Memories: SRAM and EPROM  
– Glueless Interface to Synchronous  
Memories: SDRAM and SBSRAM  
– 512M-Byte Total Addressable External  
Memory Space  
Processors (DSPs): TMS320C67x  
(TMS320C6711, C6711B, and C6711C)  
– Eight 32-Bit Instructions/Cycle  
– 100-, 150-, 167-, 200-MHz Clock Rates  
– 10-, 6.7-, 6-, 5-ns Instruction Cycle Time  
– 600, 900, 1000, 1200 MFLOPS  
VelociTI Advanced Very Long Instruction  
Word (VLIW) C67x DSP Core  
– Eight Highly Independent Functional  
Units:  
D
D
16-Bit Host-Port Interface (HPI)  
Two Multichannel Buffered Serial Ports  
(McBSPs)  
– Direct Interface to T1/E1, MVIP, SCSA  
Framers  
– ST-Bus-Switching Compatible  
– Up to 256 Channels Each  
– AC97-Compatible  
– Serial-Peripheral-Interface (SPI)  
Compatible (Motorola )  
– Four ALUs (Floating- and Fixed-Point)  
– Two ALUs (Fixed-Point)  
– Two Multipliers (Floating- and  
Fixed-Point)  
– Load-Store Architecture With 32 32-Bit  
General-Purpose Registers  
– Instruction Packing Reduces Code Size  
– All Instructions Conditional  
D
D
Two 32-Bit General-Purpose Timers  
Flexible Phase-Locked-Loop (PLL) Clock  
Generator [C6711/11B]  
D
D
Instruction Set Features  
– Hardware Support for IEEE  
Single-Precision and Double-Precision  
Instructions  
– Byte-Addressable (8-, 16-, 32-Bit Data)  
– 8-Bit Overflow Protection  
– Saturation  
– Bit-Field Extract, Set, Clear  
– Bit-Counting  
– Normalization  
D
D
D
D
D
D
Flexible Software Configurable PLL-Based  
Clock Generator Module [C6711C]  
A Dedicated General-Purpose Input/Output  
(GPIO) Module With 5 Pins [C6711C]  
IEEE-1149.1 (JTAG )  
Boundary-Scan-Compatible  
256-Pin Ball Grid Array (BGA) Package  
(GFN Suffix) [C6711/C6711B Only]  
L1/L2 Memory Architecture  
– 32K-Bit (4K-Byte) L1P Program Cache  
(Direct Mapped)  
– 32K-Bit (4K-Byte) L1D Data Cache  
(2-Way Set-Associative)  
272-Pin Ball Grid Array (BGA) Package  
(GDP Suffix) [C6711C Only]  
CMOS Technology  
– 0.13-µm/6-Level Copper Metal Process  
(C6711C)  
– 0.18-µm/5-Level Copper Metal Process  
(C6711/11B)  
– 512K-Bit (64K-Byte) L2 Unified Mapped  
RAM/Cache  
(Flexible Data/Program Allocation)  
D
D
D
3.3-V I/O, 1.26-V Internal (C6711C)  
D
D
Device Configuration  
– Boot Mode: HPI, 8-, 16-, and 32-Bit ROM  
Boot  
3.3-V I/O, 1.8-V Internal (C6711B/C6711–100)  
3.3-V I/O, 1.9-V Internal (C6711-150)  
– Endianness: Little Endian, Big Endian  
Enhanced Direct-Memory-Access (EDMA)  
Controller (16 Independent Channels)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
TMS320C67x, VelociTI, and C67x are trademarks of Texas Instruments.  
Motorola is a trademark of Motorola, Inc.  
All trademarks are the property of their respective owners.  
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.  
Copyright 2002, Texas Instruments Incorporated  
ꢜꢤ ꢛꢠ ꢧ ꢠ ꢨ ꢜꢦ ꢟꢠ ꢡ ꢢꢩ ꢀꢘ ꢠ ꢚ ꢢ ꢣ ꢢꢞꢚ ꢜꢤ ꢠꢣ ꢝ ꢘ ꢛꢠ ꢧꢙꢝ ꢠ ꢙꢚ ꢙꢡꢛ ꢙꢝꢣ ꢢꢠ ꢛ ꢜꢡ ꢢꢘ ꢠ ꢦꢣ ꢪꢠꢫ ꢚꢬ  
1
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443  

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