TXZ+ Fmaily
TMPM3H Group(2)
Datasheet
CMOS Digital Integrated Circuit Silicon Monolithic
LQFP144
(20x20 mm, 0.5 mm pitch)
LQFP128
(14x14 mm, 0.4 mm pitch)
LQFP100
(14x14 mm, 0.5 mm pitch)
LQFP80
(12x12 mm, 0.5 mm pitch)
LQFP64
TMPM3H Group(2)
General Description
● Arm® Cortex®-M3 core
(10x10 mm, 0.5 mm pitch)
Operating frequency: 1 to 120 MHz
Opetating voltage: 2.7 to 5.5V
LQFP128
Code flash: 512KB to 1MB, Data flash: 32KB
(14x20 mm, 0.5 mm pitch)
QFP100
(14x20 mm, 0.65 mm pitch)
● Package: 64-pin to 144-pin, 7 types of packages are available.
Applications
Widely used for consumer products and industrial products including home appliances, OA equipment, household
equipment, AV devices, and motor control devices.
Features
● Arm Cortex-M3 core
● LCD Display Controller (DLCD)
‒ Operating frequency: 1 to 120 MHz
‒ Non-Bias Drive: 40 segments × 4 commons (Max)
‒ Memory Protection Unit (MPU)
● Universal Asynchronous Receiver Transmitter (UART): 7 to 8
channels
● Operating voltage and Low-power consumption operation
‒ Operating voltage: 2.7 to 5.5V
‒ Up to 2.5Mbps, FIFO (Transmission 9bits × 8,
Reception 9bits × 8)
‒ Low-power consumption operation: IDLE, STOP1, STOP2
● Operating temperature: -40 to +105°C
● Internal memory
● Serial Peripheral Interface (TSPI): 1 to 5 channels
‒ SIO/SPI mode, up to 20MHz, FIFO (Transmission 16bits × 8,
Reception 16bits × 8), sector/frame mode
● I2C Interface
‒ Code flash: 512KB to 1MB, rewritable up to 100,000 times
‒ Data flash: 32 KB, rewritable up to 100,000 times
‒ I2C interface (I2C): 2 to 4 channels
Multi Master, Release function for Low Power Mode
‒ I2C interface Version A (EI2C): 2 to 4 channels
Multi Master, Support 10-bit Slave Addressing
Release function for Low Power Mode
‒ A code flash area is rewritable in parallel with instruction
execution on another code area (Only the products with 1MB
code flash)
‒ Data flash is rewritable in parallel with instruction execution
‒ RAM: 128KB and Backup RAM: 2 KB
Both RAMs have party bit.
● Comparator: 1 channel. EMG signal output to A-PMD
● 8-bit DA Converter (DAC): 2 channels
● Clock
● 12-bit ADC (ADC): 12 to 21 channels analog inputs
‒ External High-speed Oscillator: 6 MHz to 12 MHz (Ceramic,
Crystal)
‒ Built-in sample-and-hold circuit
Conversion time: 1.5µs@SCLK = 20MHz,
1.0µs@SCLK = 30MHz
‒ External High-speed clock input: 6 to 20 MHz
‒ Internal High-speed Oscillator (IHOSC1): 10 MHz, user
trimming function
‒ Support self-diagnosis function
● Advanced Programmable Motor Control Circuit (A-PMD):
1 channel
‒ PLL: 120 MHz output
‒ External Low-speed Oscillator: 32.768kHz
‒ 3-phase complementary PWM output, Synchronized with 12-bit
ADC
● Oscillation Frequency Detector (OFD): Abnormal system clock
detection
‒ Emergency stop function by external inputs (EMG0 pin, OVV0
pin)
● Voltage Detection circuit (LVD): 8 level, generate interrupts and
reset outputs
● Advanced Encoder Input Circuit (32-bit) (A-ENC32): 1 channel
‒ Encoder/sensor (3 types)/Timer/Phase counter mode
● 32-bit Timer Event Counter (T32A)
● Interrupt
‒ External factors: 12 to 23
(External pins: 12 to 34 pins with DNF)
‒ 8 channels as 32-bit timer, 16 channels as 16-bit timer
‒ Internal factors: 128 to 151
‒ Interval timer, event counter, input capture, phase difference
input, PPG output, sync start, trigger start
● I/O ports: 56 to 134 (Include Input only: 4, Output only: 1)
‒ Pull-up/pull-down resistor, Open-drain, 5V-tolerant
● On Chip Debug (JTAG/SW)
● Real Time Clock (RTC): 1 channel
● Watchdog Timer (SIWDT): 1 channel
● Trigger Selector (TRGSEL)
‒ Clock system other than the system clock can be selected
‒ Clear window, interrupts and reset output
‒ Expand Trigger request for DMAC, Timer counter and so on.
● DMA Controller (DMAC)
● Remote Control Signal Preprocessor (RMC): 1 channel
● CRC Calculation Circuit (CRC): 1channel, CRC32, CRC16
‒ DMA requests: 2units, 54 to 64 factors, internal/external
triggers
Start of commercial production
2023-05
© 2022-2023
Toshiba Electronic Devices & Storage Corporation
1 / 119
2023-04-28
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