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TMPM3HPFYADFG

更新时间: 2024-11-06 14:57:23
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东芝 - TOSHIBA /
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TMPM3HPFYADFG 数据手册

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TXZ+ Fmaily  
TMPM3H Group(1)  
Datasheet  
CMOS Digital Integrated Circuit Silicon Monolithic  
TMPM3H Group(1)  
General Description  
LQFP144  
(20x20 mm, 0.5 mm pitch)  
LQFP128  
(14x14 mm, 0.4 mm pitch)  
LQFP100  
(14x14 mm, 0.5 mm pitch)  
LQFP80  
Arm®Cortex®-M3 core, operating frequency: 1 to 120 MHz,  
opetating voltage: 2.7 to 5.5V  
(12x12 mm, 0.5 mm pitch)  
LQFP64  
(10x10 mm, 0.5 mm pitch)  
Code flash: 256KB to 512KB, Data flash: 32KB  
Package: 64-pin to 144-pin, 7 types of packages are available.  
LQFP128  
(14x20 mm, 0.5 mm pitch)  
QFP100  
(14x20 mm, 0.65 mm pitch)  
Applications  
Widely used for consumer products and industrial products including home appliances,  
OA equipment, household equipment, AV devices, and motor control devices.  
Features  
Arm Cortex-M3 core  
Universal Asynchronous Receiver Transmitter (UART): 7 to 8  
channels  
-
-
Operating frequency: 1 to 120 MHz  
Memory Protection Unit (MPU)  
-
Up to 2.5Mbps, FIFO (Transmission 9bits × 8,  
Reception 9bits × 8 )  
Operating voltage and Low-power consumption operation  
Serial Peripheral Interface (TSPI): 1 to 5 channels  
-
-
-
Operating voltage: 2.7 to 5.5V  
-
SIO/SPI mode, up to 20MHz, FIFO (Transmission 16bits × 8,  
Reception 16bits × 8), sector/frame mode  
Low-power consumption operation: IDLE, STOP1, STOP2  
Operating temperature: -40 to +105°C  
I2C Interface  
Internal memory  
-
I2C interface (I2C): 2 to 4 channels  
-
-
-
-
Code flash: 256KB to 512 KB, rewritable up to 100,000 times  
Data flash: 32 KB, rewritable up to 100,000 times  
Multi Master, Release function for Low Power Mode  
-
I2C interface Version A (EI2C): 2 to 4 channels  
Multi Master, Support 10-bit Slave Addressing  
Release function for Low Power Mode  
Data flash is rewritable in parallel with instruction execution  
RAM: 64KB and Backup RAM: 2 KB  
Both RAMs have party bit.  
Comparator: 1 channel. EMG signal output to A-PMD  
8-bit DA Converter (DAC): 2 channels  
Clock  
-
External High-speed Oscillator: 6 MHz to 12 MHz (Ceramic,  
Crystal)  
12-bit ADC (ADC): 12 to 21 channels analog inputs  
-
Built-in sample-and-hold circuit  
Conversion time: 1.5µs@SCLK = 20MHz,  
1.0µs@SCLK = 30MHz  
-
-
External High-speed clock input: 6 to 20 MHz  
Internal High-speed Oscillator (IHOSC1): 10 MHz, user trimming  
function  
-
Support self-diagnosis function  
-
-
PLL: 120 MHz output  
Advanced Programmable Motor Control Circuit (A-PMD): 1  
External Low-speed Oscillator: 32.768kHz  
channel  
Oscillation Frequency Detector (OFD): Abnormal system clock  
-
-
3-phase complementary PWM output, Synchronized with 12-bit  
ADC  
detection  
Voltage Detection circuit (LVD): 8 level, Generate interrupts and  
Emergency stop function by external inputs (EMG0 pin, OVV0  
pin)  
reset outputs  
Interrupt  
Advanced Encoder Input Circuit (A-ENC): 1 channel  
Encoder/sensor (3 types)/Timer/Phase counter mode  
32-bit Timer Event Counter (T32A)  
-
External factors: 12 to 23  
-
(External pins: 12 to 34 pins with DNF)  
-
Internal factors: 128 to 151  
-
-
8 channels as 32-bit timer, 16 channels as 16-bit timer  
I/O ports: 57 to 135 (Include Input only: 4, Output only: 1)  
Pull-up/pull-down resistor, Open-drain, 5V-tolerant  
Interval timer, event counter, input capture, phase difference  
input, PPG output, sync start, trigger start  
-
On Chip Debug (JTAG/SW)  
Trigger Selector (TRGSEL)  
Real Time Clock (RTC): 1 channel  
Watchdog Timer (SIWDT): 1 channel  
-
Expand Trigger request for DMAC, Timer counter and so on.  
DMA Controller (DMAC)  
DMA requests: 2units, 54 to 64 factors, internal/external triggers  
LCD Display Controller (DLCD)  
Non-Bias Drive: 40 segments × 4 commons (Max)  
-
-
Clock system other than the system clock can be selected  
Clear window, interrupts and reset output  
-
Remote Control Signal Preprocessor (RMC): 1 channel  
CRC Calculation Circuit (CRC): 1channel, CRC32, CRC16  
-
Start of commercial production  
2022-05  
© 2021-2023  
Toshiba Electronic Devices & Storage Corporation  
1 / 117  
2023-07-07  
Rev.2.3