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TL16C550DRHBR PDF预览

TL16C550DRHBR

更新时间： 2024-11-22 05:53:19
品牌 Logo 应用领域
德州仪器 - TI 微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输时钟
页数 文件大小 规格书
54页 1482K
描述
ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL

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TL16C550DRHBR 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN, LCC32,.2SQ,20针数：32
Reach Compliance Code：compliantHTS代码：8542.31.00.01
Factory Lead Time：1 week风险等级：5.72
Is Samacsys：N其他特性：ALSO OPERATES AT 2.5V/3.3V SUPPLY
地址总线宽度：3边界扫描：NO
最大时钟频率：24 MHz通信协议：ASYNC, BIT
最大数据传输速率：0.1875 MBps外部数据总线宽度：8
JESD-30 代码：S-PQCC-N32JESD-609代码：e4
长度：5 mm低功率模式：NO
湿度敏感等级：2串行 I/O 数：1
端子数量：32最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装等效代码：LCC32,.2SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260电源：2.5/5 V
认证状态：Not Qualified座面最大高度：1 mm
子类别：Serial IO/Communication Controllers最大压摆率：8 mA
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5 mm
uPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches：1

TL16C550DRHBR 数据手册

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TL16C550D, TL16C550DI  
www.ti.com .................................................................................................................................................. SLLS597E–APRIL 2004–REVISED DECEMBER 2008  
ASYNCHRONOUS COMMUNICATIONS ELEMENT  
WITH AUTOFLOW CONTROL  
1
FEATURES  
•
•
•
Programmable Auto-RTS and Auto-CTS  
•
Standard Asynchronous Communication Bits  
(Start, Stop, and Parity) Added to or Deleted  
From the Serial Data Stream  
In Auto-CTS Mode, CTS Controls Transmitter  
In Auto-RTS Mode, RCV FIFO Contents and  
Threshold Control RTS  
•
•
•
5-V, 3.3-V, and 2.5-V Operation  
Independent Receiver Clock Input  
•
Serial and Modem Control Outputs Drive a  
RJ11 Cable Directly When Equipment Is on the  
Same Power Drop  
Transmit, Receive, Line Status, and Data Set  
Interrupts Independently Controlled  
•
•
•
•
•
Capable of Running With All Existing  
TL16C450 Software  
•
Fully Programmable Serial Interface  
Characteristics:  
After Reset, All Registers Are Identical to the  
TL16C450 Register Set  
–
–
5-, 6-, 7-, or 8-Bit Characters  
Even-, Odd-, or No-Parity Bit Generation  
and Detection  
Up to 24-MHz Clock Rate for up to 1.5-Mbaud  
Operation With VCC = 5 V  
–
–
1-, 1 ＝-, or 2-Stop Bit Generation  
Up to 20-MHz Clock Rate for up to 1.25-Mbaud  
Operation With VCC = 3.3 V  
Baud Generation (dc to 1 Mbit/s)  
•
•
•
False-Start Bit Detection  
Up to 48-MHz Clock Rate for up to 3-Mbaud  
Operation with VCC = 3.3 V (ZQS Package Only,  
Divisor = 1)  
Complete Status Reporting Capabilities  
3-State Output TTL Drive Capabilities for  
Bidirectional Data Bus and Control Bus  
•
Up to 40-MHz Clock Rate for up to 2.5-Mbaud  
Operation with VCC = 3.3 V (ZQS Package Only,  
Divisor ≥ 2)  
•
•
Line Break Generation and Detection  
Internal Diagnostic Capabilities:  
–
Loopback Controls for Communications  
Link Fault Isolation  
•
•
Up to 16-MHz Clock Rate for up to 1-Mbaud  
Operation With VCC = 2.5 V  
–
Break, Parity, Overrun, and Framing Error  
Simulation  
In the TL16C450 Mode, Hold and Shift  
Registers Eliminate the Need for Precise  
Synchronization Between the CPU and Serial  
Data  
•
•
Fully Prioritized Interrupt System Controls  
Modem Control Functions (CTS, RTS, DSR,  
DTR, RI, and DCD)  
•
Programmable Baud Rate Generator Allows  
Division of Any Input Reference Clock by 1 to  
(216 –1) and Generates an Internal 16× Clock  
•
Available in 48-Pin PT, 48-Pin PFB, 32-Pin  
RHB, and 24-Pin ZQS Packages  
DESCRIPTION/ORDERING INFORMATION  
The TL16C550D and the TL16C550DI are speed and operating voltage upgrades (but functional equivalents) of  
the TL16C550C asynchronous communications element (ACE), which in turn is a functional upgrade of the  
TL16C450. Functionally equivalent to the TL16C450 on power up (character or TL16C450 mode), the  
TL16C550D and the TL16C550DI, like the TL16C550C, can be placed in an alternate FIFO mode. This relieves  
the CPU of excessive software overhead by buffering received and transmitted characters. The receiver and  
transmitter FIFOs store up to 16 bytes including three additional bits of error status per byte for the receiver  
FIFO. In the FIFO mode, there is a selectable autoflow control feature that can significantly reduce software  
overload and increase system efficiency by automatically controlling serial data flow using RTS output and CTS  
input signals.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2004–2008, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
 
 
 
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TL16C550DRHBR 替代型号

型号 品牌 替代类型 描述 数据表
TL16C2550IRHB TI

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 ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL
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