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TL16C550DRHB PDF预览

TL16C550DRHB

更新时间： 2024-09-26 22:29:51
品牌 Logo 应用领域
德州仪器 - TI 通信
页数 文件大小 规格书
50页 822K
描述
ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL

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中文翻译

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TL16C550DRHB 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN, LCC32,.2SQ,20针数：32
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.69其他特性：ALSO OPERATES AT 2.5V/3.3V SUPPLY
地址总线宽度：3边界扫描：NO
最大时钟频率：24 MHz通信协议：ASYNC, BIT
最大数据传输速率：0.1875 MBps外部数据总线宽度：8
JESD-30 代码：S-PQCC-N32JESD-609代码：e4
长度：5 mm低功率模式：NO
湿度敏感等级：2串行 I/O 数：1
端子数量：32最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装等效代码：LCC32,.2SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260电源：2.5/5 V
认证状态：Not Qualified座面最大高度：1 mm
子类别：Serial IO/Communication Controllers最大压摆率：8 mA
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5 mm
uPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches：1

TL16C550DRHB 数据手册

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SLLS597C − APRIL 2004 − REVISED JUNE 2005  
D
D
D
D
Programmable Auto-RTS and Auto-CTS  
D
D
D
D
5-V, 3.3-V, and 2.5-V Operation  
In Auto-CTS Mode, CTS Controls  
Transmitter  
Independent Receiver Clock Input  
Transmit, Receive, Line Status, and Data  
Set Interrupts Independently Controlled  
In Auto-RTS Mode, RCV FIFO Contents and  
Threshold Control RTS  
Fully Programmable Serial Interface  
Characteristics:  
− 5-, 6-, 7-, or 8-Bit Characters  
− Even-, Odd-, or No-Parity Bit Generation  
and Detection  
Serial and Modem Control Outputs Drive a  
RJ11 Cable Directly When Equipment Is on  
the Same Power Drop  
D
D
D
D
D
D
Capable of Running With All Existing  
TL16C450 Software  
− 1-, 1 1/2-, or 2-Stop Bit Generation  
− Baud Generation (dc to 1 Mbit/s)  
After Reset, All Registers Are Identical to  
the TL16C450 Register Set  
D
D
D
False-Start Bit Detection  
Complete Status Reporting Capabilities  
Up to 24-MHz Clock Rate for up to  
1.5-Mbaud Operation With V = 5 V  
3-State Output TTL Drive Capabilities for  
Bidirectional Data Bus and Control Bus  
CC  
Up to 20-MHz Clock Rate for up to  
1.25-Mbaud Operation With V = 3.3 V  
D
Line Break Generation and Detection  
CC  
Up to 16-MHz Clock Rate for up to 1-Mbaud  
D
Internal Diagnostic Capabilities:  
− Loopback Controls for Communications  
Link Fault Isolation  
− Break, Parity, Overrun, and Framing  
Error Simulation  
Operation With V = 2.5 V  
CC  
In the TL16C450 Mode, Hold and Shift  
Registers Eliminate the Need for Precise  
Synchronization Between the CPU and  
Serial Data  
D
D
D
Fully Prioritized Interrupt System Controls  
D
D
Programmable Baud Rate Generator Allows  
Division of Any Input Reference Clock by 1  
Modem Control Functions (CTS, RTS, DSR,  
DTR, RI, and DCD)  
16  
to (2 −1) and Generates an Internal 16×  
Available in 48-Pin PT, 48-Pin PFB, and  
32-Pin RHB Packages  
Clock  
Standard Asynchronous Communication  
Bits (Start, Stop, and Parity) Added to or  
Deleted From the Serial Data Stream  
description  
The TL16C550D and the TL16C550DI are speed and operating voltage upgrades (but functional equivalents)  
of the TL16C550C asynchronous communications element (ACE), which in turn is a functional upgrade of the  
TL16C450. Functionally equivalent to the TL16C450 on power up (character or TL16C450 mode), the  
TL16C550D and the TL16C550DI, like the TL16C550C, can be placed in an alternate FIFO mode. This relieves  
the CPU of excessive software overhead by buffering received and transmitted characters. The receiver and  
transmitter FIFOs store up to 16 bytes including three additional bits of error status per byte for the receiver  
FIFO. In the FIFO mode, there is a selectable autoflow control feature that can significantly reduce software  
overload and increase system efficiency by automatically controlling serial data flow using RTS output and CTS  
input signals.  
The TL16C550D and TL16C550DI perform serial-to-parallel conversions on data received from a peripheral  
device or modem and parallel-to-serial conversion on data received from its CPU. The CPU can read the ACE  
status at any time. The ACE includes complete modem control capability and a processor interrupt system that  
can be tailored to minimize software management of the communications link.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2004 − 2005, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...50

中文翻译

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TL16C550DRHB 替代型号

型号 品牌 替代类型 描述 数据表
TL16C550DRHBG4 TI

完全替代

 ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL
TL16C550DRHBR TI

类似代替

 ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL
TL16C2550IRHB TI

类似代替

 1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS

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