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TK10P50W PDF预览

TK10P50W

更新时间: 2024-09-17 14:56:51
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
10页 275K
描述
N-ch MOSFET, 500 V, 0.43 Ω@10V, DPAK, DTMOSⅣ

TK10P50W 数据手册

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TK10P50W  
MOSFETs Silicon N-Channel MOS (DTMOS)  
TK10P50W  
1. Applications  
Switching Voltage Regulators  
2. Features  
(1) Low drain-source on-resistance: RDS(ON) = 0.327 (typ.)  
by used to Super Junction Structure : DTMOS  
(2) Easy to control Gate switching  
(3) Enhancement mode: Vth = 2.7 to 3.7 V (VDS = 10 V, ID = 0.5 mA)  
3. Packaging and Internal Circuit  
1: Gate  
2: Drain (Heatsink)  
3: Source  
DPAK  
4. Absolute Maximum Ratings (Note) (Ta = 25unless otherwise specified)  
Characteristics  
Symbol  
Rating  
Unit  
V
Drain-source voltage  
Gate-source voltage  
Drain current (DC)  
Drain current (pulsed)  
Power dissipation  
VDSS  
VGSS  
ID  
500  
±30  
(Note 1)  
(Note 1)  
9.7  
A
IDP  
38.8  
80  
(Tc = 25)  
PD  
W
mJ  
A
Single-pulse avalanche energy  
Avalanche current  
(Note 2)  
EAS  
IAR  
145  
2.5  
Reverse drain current (DC)  
Reverse drain current (pulsed)  
Channel temperature  
(Note 1)  
(Note 1)  
IDR  
9.7  
IDRP  
Tch  
38.8  
150  
Storage temperature  
Tstg  
-55 to 150  
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the  
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even  
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum  
ratings.  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test  
report and estimated failure rate, etc).  
Start of commercial production  
2016-01  
©2015 Toshiba Corporation  
2015-12-08  
Rev.1.0  
1

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