Datasheet > TFA9881_1104

TFA9881_1104

更新时间： 2024-11-14 08:49:55

品牌	Logo	应用领域
恩智浦 - NXP		音频放大器光电二极管
页数	文件大小	规格书
32页	397K
描述
3.4 W PDM input class-D audio amplifier

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TFA9881_1104 数据手册

TFA9881

3.4 W PDM input class-D audio amplifier

Rev. 2 — 1 April 2011

Product data sheet

1. General description

The TFA9881 is a mono, filter-free class-D audio amplifier in a 9-bump WLCSP (Wafer

Level Chip-Size Package) with a 400 μm pitch.

The digital input interface is an over-sampled Pulse Density Modulated (PDM) bit stream.

The TFA9881 receives audio and control settings via this interface. Dedicated silence

patterns are used to configure the control settings of the device, such as mute, gain, Pulse

Width Modulated (PWM) output slope, clip control and bandwidth extension (this control

mechanism is not required if the default settings are used). The Power-down to Operating

mode transition is triggered when a clock signal is detected.

The device features low RF susceptibility because it has a digital input interface that is

insensitive to clock jitter. The second order closed loop architecture used in the TFA9881

provides excellent audio performance and high supply voltage ripple rejection.

2. Features and benefits

Small outline WLCSP9 package: 1.3 × 1.3 × 0.6 mm

Wide supply voltage range (fully operational from 2.5 V to 5.5 V)

High efficiency (90 %, 4 Ω/20 μH load) and low power dissipation

Quiescent power:

6.5 mW (V_DDD= 1.8 V, V_DDP= 3.6 V, 4 Ω/20 μH load, f_clk= 2.048 MHz)

7.8 mW (V_DDD= 1.8 V, V_DDP= 3.6 V, 4 Ω/20 μH load, f_clk= 6.144 MHz)

Output power:

1.4 W into 4 Ω at 3.6 V supply (THD = 1 %)

2.7 W into 4 Ω at 5.0 V supply (THD = 1 %)

3.4 W into 4 Ω at 5.0 V supply (THD = 10 %)

Output noise voltage: 24 μV (A-weighted)

Signal-to-noise ratio: 103 dB (V_DDP= 5 V, A-weighted)

Fully short-circuit proof across load and to supply lines

Current limiting to avoid audio holes

Thermally protected

Undervoltage and overvoltage protection

High-pass filter for DC blocking

Invalid data protection

Simple two-wire interface for audio and control settings

Left/right selection

Three gain settings: −3 dB, 0 dB and +3 dB

PWM output slope setting for EMI reduction

12 3 4 5 6 7...32

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