TDA8020

更新时间： 2024-02-12 15:26:24

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
24页	115K
描述
Dual smart card interface

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

TDA8020 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
Reach Compliance Code：	unknown	风险等级：	5.58
Is Samacsys：	N	JESD-30 代码：	S-PQFP-G32
JESD-609代码：	e3	端子数量：	32
最高工作温度：	85 °C	最低工作温度：	-25 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装等效代码：	QFP32,.35SQ,32	封装形状：	SQUARE
封装形式：	FLATPACK	电源：	1.5,3.3 V
认证状态：	Not Qualified	子类别：	Other Microprocessor ICs
表面贴装：	YES	温度等级：	OTHER
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	0.8 mm	端子位置：	QUAD
uPs/uCs/外围集成电路类型：	MICROPROCESSOR CIRCUIT	Base Number Matches：	1

TDA8020 数据手册

Philips Semiconductors

Product speciﬁcation

Dual smart card interface

TDA8020HL

READING STATUS

START, ADDRESS, READ, STATUS byte, STOP.

Table 4 STATUS bits (all bits cleared after power-on, except SUPL and PRES)

NAME

PRES

BIT

DESCRIPTION

set when the card is present; reset when the card is not present

PRESL

I/O

set when the card has been inserted or extracted; reset when the status has been read

set when I/O is HIGH and reset if I/O is LOW

SUPL

PROT

set when the supervisor has signalled a fault; reset when the status has been read

set when an overload or an overheating has occurred during a session; reset when the

status has been read

MUTE

set during ATR when the selected card has not answered during the ISO 7816 time slots

set during ATR when the selected card has answered too early

set if the card is active; reset if the card is inactive

EARLY

ACTIVE

When one of the bits PRESL, MUTE, EARLY and PROT is set, then pin IRQ goes LOW until the status byte has been

read. After power-on, bit SUPL is set until the status byte has been read, and pin IRQ is LOW until the supervisor

becomes inactive.

DC/DC converter

If V_DD> 3 V, for 5 V cards, then both cards can draw up to

55 mA at the same time.

V_CC1is the supply voltage for card 1 contacts, V_CC2for

card 2 contacts. Card 1 and card 2 may be independently

powered-down, powered at 5 V or powered at 3 V. A

capacitor type step-up converter is used for generating

these voltages. This step-up converter acts either as a

doubler, tripler or follower.

If V_DD> 3.3 V, for 3 V cards, then both cards can draw up

to 50 mA at the same time.

The DC/DC converter is powered with specific pins (V_DDA

and AGND) to enable separate decoupling.

The output voltage, V_UP, is internally fed to the V_CC

generators. V_CC1, V_CC2and CGND1, CGND2 are used as

a reference for all other cards contacts.

If V_CCis the maximum value of V_CC1and V_CC2, then there

are 4 possible situations:

• V_DD= 3 V and V_CC= 3 V: in this case, the DC/DC

converter acts as a doubler with a regulation of

approximately 4.0 V

Sequencers and clock counter

Two sequencers are used to ensure activation and

deactivation sequences according to ISO 7816 and

EMV norms, even in the event of an emergency (card

removal during transaction, supply drop-out and hardware

problem).

• V_DD= 3 V and V_CC= 5 V: in this case, the DC/DC

converter acts as a tripler with a regulation of

approximately 5.5 V

• V_DD= 5 V and V_CC= 3 V: in this case, the DC/DC

converter acts as a follower: V_DDis applied on V_UP

The sequencers are clocked by the internal oscillator.

• V_DD= 5 V and V_CC= 5 V: in this case, the DC/DC

converter acts as a doubler with a regulation of

approximately 5.5 V.

The activation of a card is initiated by setting the card

select bit and the start bit within the control register. This is

only possible if the card is present and if the voltage

supervisor is not active.

The switch between the modes is automatically executed

when V_DDis approximately 3.4 V.

During activation the DC/DC converter is initiated (except

if another card is already powered up or if V_DD= 5 V and

V_CC= 3 V). V_CCthen goes high to the selected voltage

(3 or 5 V), the I/O lines are then enabled and the clock is

started with RST LOW.

Each card may independently draw a current up to 65 mA,

also during activation, with a supply voltage from 2.5 V up

to 6.5 V provided the sum of I_CC1and I_CC2does not

exceed 80 mA.

2001 Aug 15

1...6 7 8910 11 12...24

下载PDF

与TDA8020相关器件

型号	品牌	描述	获取价格	数据表
TDA8020HL	NXP	Dual smart card interface	获取价格
TDA8020HL/C1	NXP	IC SPECIALTY CONSUMER CIRCUIT, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-358-	获取价格
TDA8020HL/C1	PHILIPS	Microprocessor Circuit, PQFP32	获取价格
TDA8020HL/C1,151	NXP	TDA8020HL - Dual IC card interface QFP 32-Pin	获取价格
TDA8020HL/C2	PHILIPS	Microprocessor Circuit, PQFP32	获取价格
TDA8020HL/C2,118	NXP	TDA8020HL - Dual IC card interface QFP 32-Pin	获取价格

与TDA8020相关文章

STM32H743技术深度剖析与应用案例探索
2024-05-30

15
LM321中文资料解析：引脚功能介绍、技术特点、技术特性分析
2024-05-30

15
74HC14芯片资料介绍：性能特性分析、引脚介绍
2024-05-30

12
LM1875芯片手册：功放参数分析、引脚说明、电路设计要点
2024-05-30

10

产品中心

服务支持

精选活动

关于我们

帮助中心

TDA8020

TDA8020 技术参数

TDA8020 数据手册

与TDA8020相关器件

与TDA8020相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

TDA8020

TDA8020 技术参数

TDA8020 数据手册

与TDA8020相关器件

与TDA8020相关文章

您还可以找

您在本页遇到什么问题？