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TC9400C/JD PDF预览

TC9400C/JD

更新时间： 2024-01-08 23:21:59
品牌 Logo 应用领域
美国微芯 - MICROCHIP 转换器
页数 文件大小 规格书
20页 504K
描述
IC,VOLTAGE-TO-FREQUENCY CONVERTER,CMOS,DIP,14PIN

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中文翻译

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TC9400C/JD 技术参数

生命周期：Obsolete零件包装代码：DIP
包装说明：SDIP, SDIP24,.3针数：24
Reach Compliance Code：unknown风险等级：5.73
转换器类型：D/A CONVERTER输入位码：BINARY
输入格式：SERIALJESD-30 代码：R-PDIP-T24
长度：22 mm位数：1
功能数量：1端子数量：24
最高工作温度：85 °C最低工作温度：-35 °C
封装主体材料：PLASTIC/EPOXY封装代码：SDIP
封装等效代码：SDIP24,.3封装形状：RECTANGULAR
封装形式：IN-LINE, SHRINK PITCH电源：5 V
认证状态：Not Qualified座面最大高度：4.5 mm
子类别：Other Converters最大压摆率：40 mA
标称供电电压：5 V表面贴装：NO
技术：CMOS温度等级：OTHER
端子形式：THROUGH-HOLE端子节距：1.778 mm
端子位置：DUAL宽度：7.62 mm
Base Number Matches：1

TC9400C/JD 数据手册

 浏览型号TC9400C/JD的Datasheet PDF文件第5页浏览型号TC9400C/JD的Datasheet PDF文件第6页浏览型号TC9400C/JD的Datasheet PDF文件第7页浏览型号TC9400C/JD的Datasheet PDF文件第9页浏览型号TC9400C/JD的Datasheet PDF文件第10页浏览型号TC9400C/JD的Datasheet PDF文件第11页 
TC9400/9401/9402  
3.2  
Voltage-to-Time Measurements  
4.0  
4.1  
PIN FUNCTIONS  
The TC9400 output can be measured in the time  
domain as well as the frequency domain. Some micro-  
computers, for example, have extensive timing capabil-  
ity, but limited counter capability. Also, the response  
time of a time domain measurement is only the period  
between two output pulses, while the frequency mea-  
surement must accumulate pulses during the entire  
counter time-base period.  
Threshold Detector Input  
In the V/F mode, this input is connected to the AMPLI-  
FIER OUT output (Pin 12) and triggers a 3µsec pulse  
when the input voltage passes through its threshold. In  
the F/V mode, the input frequency is applied to this  
input.  
The nominal threshold of the detector is half way  
Time measurements can be made from either the  
TC9400's PULSE FREQ OUT output, or from the  
FREQ/2 OUT output. The FREQ/2 OUT output  
changes state on the rising edge of PULSE FREQ  
OUT, so FREQ/2 OUT is a symmetrical square wave at  
one-half the pulse output frequency. Timing measure-  
ments can, therefore, be made between successive  
PULSE FREQ OUT pulses, or while FREQ/2 OUT is  
high (or low).  
between the power supplies, or (V + V )/2 ±400mV.  
DD  
SS  
The TC9400's charge balancing V/F technique is not  
dependent on precision comparator threshold,  
a
because the threshold only sets the lower limit of the  
Op Amp output. The Op Amp's peak-to-peak output  
swing, which determines the frequency, is only  
influenced by external capacitors and by V  
.
REF  
4.2  
Pulse Freq Out  
This output is an open drain N-channel FET, which pro-  
vides a pulse waveform whose frequency is propor-  
tional to the input voltage. This output requires a pull-  
up resistor and interfaces directly with MOS, CMOS,  
and TTL logic (see Figure 4-1).  
FIGURE 4-1:  
OUTPUT WAVEFORMS  
3µsec  
Typ.  
F
OUT  
1/f  
F /2  
OUT  
C
REF  
C
INT  
V
REF  
0V  
Amp Out  
Notes: 1. To adjust F  
, set V = 10mV and adjust the 50kΩ offset for 10Hz output.  
IN  
MIN  
2. To adjust F  
MAX  
3. To increase F  
, set V = 10V and adjust R or V  
for 10kHz output.  
IN  
MAX to 100kHz, change C  
IN  
REF  
to 2pF and C to 75pF.  
INT  
OUT  
REF  
4. For high performance applications, use high stability components for R , C (metal film  
, V  
IN REF REF  
resistors and glass capacitors). Also, separate output ground (Pin 9) from input ground (Pin 6).  
DS21483B-page 8  
2002 Microchip Technology Inc.  
1...567891011...20

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