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TC7SH00FE(TE85L) PDF预览

TC7SH00FE(TE85L)

更新时间: 2024-11-21 15:53:59
品牌 Logo 应用领域
东芝 - TOSHIBA 输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
6页 138K
描述
IC,LOGIC GATE,2-INPUT NAND,CMOS,FP,6PIN,PLASTIC

TC7SH00FE(TE85L) 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DFP, FL6,.047,20Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-PDFP-F6
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.004 A端子数量:6
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DFP
封装等效代码:FL6,.047,20封装形状:RECTANGULAR
封装形式:FLATPACK包装方法:TAPE AND REEL
电源:2/5.5 VProp。Delay @ Nom-Sup:13 ns
认证状态:Not Qualified施密特触发器:NO
子类别:Gates表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:FLAT端子节距:0.5 mm
端子位置:DUALBase Number Matches:1

TC7SH00FE(TE85L) 数据手册

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TC7SH00FE  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC7SH00FE  
2-Input NAND Gate  
Features  
High speed operation  
: t = 3.7ns (typ.) at V  
= 5V, 15pF  
pd  
CC  
Low power dissipation : I  
= 2μA (max) at Ta = 25°C  
CC  
Wide operating voltage range : V  
= 2 to 5.5V  
CC  
High noise immunity  
5.5V tolerant inputs  
: V  
NIH  
= V  
NIL  
= 28% V (min)  
CC  
(ESV)  
Weight: 0.003 g (typ.)  
Marking  
Pin Assignment (top view)  
Product name  
IN B  
IN A  
GND  
1
2
3
5
V
CC  
H 1  
4
OUT Y  
Absolute Maximum Ratings (Ta = 25°C)  
Characteristics  
Supply voltage  
Symbol  
Rating  
Unit  
V
0.5 to 7  
0.5 to 7  
V
V
CC  
DC input voltage  
V
IN  
DC output voltage  
Input diode current  
Output diode current  
DC output current  
V
0.5 to V  
+ 0.5  
V
OUT  
CC  
I
20  
mA  
mA  
mA  
mA  
mW  
°C  
IK  
I
± 20  
± 25  
± 50  
150  
(Note 1)  
OK  
I
OUT  
DC V /ground current  
CC  
I
CC  
Power dissipation  
P
D
Storage temperature  
T
65 to 150  
stg  
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the  
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if  
the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum  
ratings and the operating ranges.  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test  
report and estimated failure rate, etc).  
Note1: VOUT < GND, VOUT > VCC  
1
2009-09-09  

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