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TC7SH00FU(T5L,T) PDF预览

TC7SH00FU(T5L,T)

更新时间: 2024-11-22 10:45:51
品牌 Logo 应用领域
东芝 - TOSHIBA 逻辑集成电路
页数 文件大小 规格书
7页 125K
描述
NAND Gate

TC7SH00FU(T5L,T) 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:unknown风险等级:5.82
逻辑集成电路类型:NAND GATE

TC7SH00FU(T5L,T) 数据手册

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TC7SH00FU  
CMOS Digital Integrated Circuits Silicon Monolithic  
TC7SH00FU  
1. Functional Description  
2-Input NAND Gate  
2. Features  
(1) AEC-Q100 (Rev. H) (Note 1)  
(2) Wide operating temperature range: Topr = -40 to 125 (Note 2)  
(3) High speed operation: tpd = 3.7 ns (typ.) (VCC = 5.0 V, CL = 15 pF)  
(4) Low power dissipation: ICC = 2.0 µA (max) (Ta = 25 )  
(5) 5.5 V tolerant inputs  
(6) Balanced Propagation Delay: tPLH tPHL  
(7) Wide operating voltage range: VCC = 2.0 to 5.5 V  
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales  
representative.  
Note 2: For devices with the ordering part number ending in J(CT. Topr = -40 to 85 for the other devices.  
3. Packaging  
USV  
Start of commercial production  
1993-09  
©2016 Toshiba Corporation  
2017-05-16  
Rev.3.0  
1

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