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TC74VHC174F_07 PDF预览

TC74VHC174F_07

更新时间: 2024-11-16 05:15:59
品牌 Logo 应用领域
东芝 - TOSHIBA 触发器
页数 文件大小 规格书
10页 233K
描述
Hex D-Type Flip Flop with Clear

TC74VHC174F_07 数据手册

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TC74VHC174F/FN/FT  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VHC174F,TC74VHC174FN,TC74VHC174FT  
Hex D-Type Flip Flop with Clear  
Note: xxxFN (JEDEC SOP) is not available in  
Japan.  
The TC74VHC174 is an advanced high speed CMOS HEX  
D-TYPE FLIP FLOP fabricated with silicon gate C2MOS  
TC74VHC174F  
technology.  
It achieves the high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low power  
dissipation.  
Information signals applied to D inputs are transferred to the  
Q output on the positive going edge of the clock pulse.  
When the CLR input is held low, the Q output are in the low  
logic level independent of the other inputs.  
An input protection circuit ensures that 0 to 5.5 V can be  
TC74VHC174FN  
applied to the input pins without regard to the supply voltage.  
This device can be used to interface 5 to 3 V systems and two  
supply systems such as battery back up. This circuit prevents  
device destruction due to mismatched supply and input voltages.  
Features  
High speed: f  
= 150 MHz (typ.) at V  
= 5 V  
max  
CC  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
TC74VHC174FT  
High noise immunity: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Power down protection is provided on all inputs.  
Balanced propagation delays: t  
t
pHL  
pLH  
Wide operating voltage range: V  
= 2 to 5.5 V  
CC (opr)  
Low noise: V  
= 0.8 V (max)  
OLP  
Pin and function compatible with 74ALS174  
Weight  
SOP16-P-300-1.27A  
SOL16-P-150-1.27  
TSSOP16-P-0044-0.65A  
: 0.18 g (typ.)  
: 0.13 g (typ.)  
: 0.06 g (typ.)  
2007-10-01  
1

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