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TC74HC7292AP_07 PDF预览

TC74HC7292AP_07

更新时间: 2024-11-25 05:04:07
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
10页 408K
描述
Programmable Divider/Timer

TC74HC7292AP_07 数据手册

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TC74HC7292AP/AF  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74HC7292AP,TC74HC7292AF  
Programmable Divider/Timer  
The TC74HC7292A is a high speed CMOS PROGRAMMABLE  
DIVIDER/TIMER fabricated with silicon gate C2MOS technology.  
TC74HC7292AP  
It achieves the high speed operation similar to equivalent  
LSTTL while maintaining the CMOS low power dissipation.  
The TC74HC7292A can divide from 22 to 231.  
CK1 and CK2 are clock inputs, either one may be used for clock  
gating.  
It features an active-low clear input to initialize the state of all  
flip-flops.  
To facilitate incoming inspection, test points are provided. (TP1,  
TP2 and TP3)  
TC74HC7292AF  
All inputs are equipped with protection circuits against static  
discharge or transient excess voltage.  
Features  
High speed: f  
= 70 MHz (typ.) at V  
= 5 V  
max  
CC  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
High noise immunity: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Output drive capability: 10 LSTTL loads  
Symmetrical output impedance: |I | = I  
Weight  
DIP16-P-300-2.54A  
SOP16-P-300-1.27A  
= 4 mA (min)  
OL  
OH  
: 1.00 g (typ.)  
: 0.18 g (typ.)  
Balanced propagation delays: t  
t
pHL  
pLH  
Wide operating voltage range: V  
(opr) = 2 to 6 V  
CC  
Pin and function compatible with 74LS292  
Pin Assignment  
1
2007-10-01  

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