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TC74AC175FS PDF预览

TC74AC175FS

更新时间: 2024-11-23 13:14:27
品牌 Logo 应用领域
东芝 - TOSHIBA 触发器
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10页 274K
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TC74AC175FS 数据手册

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TC74AC175P/F/FN/FT  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74AC175P,TC74AC175F,TC74AC175FN,TC74AC175FT  
Quad D-Type Flip Flop with Clear  
Note: xxxFN (JEDEC SOP) is not available in  
Japan.  
The TC74AC175 is an advanced high speed CMOS QUAD  
D-TYPE FLIP FLOP fabricated with silicon gate and  
TC74AC175P  
double-layer metal wiring C2MOS technology.  
It achieves the high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low power  
dissipation.  
These four flip-flops are controlled by a clock input (CK) and a  
clear input (CLR ).  
The information data applied to the D inputs (D1 thru D4) are  
transferred to the outputs (Q1 thru Q4 and Q1 thru Q4 ) on the  
positive-going edge of the clock pulse.  
Reset function is accomplished when the clear input is taken  
TC74AC175F  
low, and all Q outputs are kept in low level regardless of other  
input conditions.  
All inputs are equipped with protection circuits against static  
discharge or transient excess voltage.  
Features  
High speed: f  
= 170 MHz (typ.) at V  
= 5 V  
max  
CC  
Low power dissipation: I  
= 8 μA (max) at Ta = 25°C  
TC74AC175FN  
CC  
High noise immunity: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Symmetrical output impedance: |I | = I  
= 24 mA (min)  
OH  
OL  
Capability of driving 50 Ω  
transmission lines.  
t
pHL  
Balanced propagation delays: t  
pLH  
Wide operating voltage range: V  
= 2 to 5.5 V  
CC (opr)  
Pin and function compatible with 74F175  
TC74AC175FT  
Weight  
DIP16-P-300-2.54A  
SOP16-P-300-1.27A  
SOL16-P-150-1.27  
TSSOP16-P-0044-0.65A  
: 1.00 g (typ.)  
: 0.18 g (typ.)  
: 0.13 g (typ.)  
: 0.06 g (typ.)  
1
2007-10-01  

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