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TC74AC240FW-ELP PDF预览

TC74AC240FW-ELP

更新时间: 2024-11-23 13:14:27
品牌 Logo 应用领域
东芝 - TOSHIBA 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 237K
描述
IC AC SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, 0.300 INCH, PLASTIC, SOIC-20, Bus Driver/Transceiver

TC74AC240FW-ELP 技术参数

生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP20,.4针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.17其他特性:50 OHM LINE DRIVE CAPABILITY FOR < = 10MS ONE O/P AT A TIME
控制类型:ENABLE LOW系列:AC
JESD-30 代码:R-PDSO-G20负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.012 A
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
电源:3.3/5 VProp。Delay @ Nom-Sup:12 ns
传播延迟(tpd):8 ns认证状态:Not Qualified
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

TC74AC240FW-ELP 数据手册

 浏览型号TC74AC240FW-ELP的Datasheet PDF文件第2页浏览型号TC74AC240FW-ELP的Datasheet PDF文件第3页浏览型号TC74AC240FW-ELP的Datasheet PDF文件第4页浏览型号TC74AC240FW-ELP的Datasheet PDF文件第5页浏览型号TC74AC240FW-ELP的Datasheet PDF文件第6页浏览型号TC74AC240FW-ELP的Datasheet PDF文件第7页 
TC74AC240,244P/F/ FT  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74AC240P,TC74AC240F,TC74AC240FT  
TC74AC244P,TC74AC244F,TC74AC244FT  
Octal Bus Buffer  
TC74AC240P/F/FT  
Inverted, 3-State  
Outputs  
TC74AC240P, TC74AC244P  
TC74AC240F, TC74AC244F  
TC74AC240FT, TC74AC244FT  
TC74AC244P/F/FT  
Non-Inverted, 3-State  
Outputs  
The TC74AC240 and 244 are advanced high speed CMOS  
OCTAL BUS BUFFERs fabricated with silicon gate and  
double-layer metal wiring C2MOS technology.  
They achieve the high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low power  
dissipation.  
The 74AC240 is an inverting 3-state buffer while the 74AC244  
is non-inverting. Both devices have two active-low output  
enables.  
These devices are designed to be used in such applications as  
3-state memory address drivers.  
All inputs are equipped with protection circuits against static  
discharge or transient excess voltage.  
Features  
High speed: t = 4.0 ns (typ.) at V  
= 5 V  
pd  
CC  
Low power dissipation: I  
= 8 μA (max) at Ta = 25°C  
CC  
High noise immunity: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Symmetrical output impedance: |I | = I  
= 24 mA (min)  
OH  
OL  
Capability of driving 50 Ω  
transmission lines.  
t
pHL  
Balanced propagation delays: t  
Weight  
pLH  
DIP20-P-300-2.54A  
SOP20-P-300-1.27A  
TSSOP20-P-0044-0.65A  
: 1.30 g (typ.)  
: 0.22 g (typ.)  
: 0.08 g (typ.)  
Wide operating voltage range: V  
= 2 to 5.5 V  
CC (opr)  
Pin and function compatible with 74F240/244  
1
2007-10-01  

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