Datasheet > TC74AC174P_07

TC74AC174P_07

更新时间： 2024-01-22 17:13:42

品牌	Logo	应用领域
东芝 - TOSHIBA		触发器
页数	文件大小	规格书
10页	272K
描述
CMOS Digital Integrated Circuit Silicon Monolithic Hex D-Type Flip Flop with Clear

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数据手册

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TC74AC174P_07 数据手册

TC74AC174P/F/FN/FT

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74AC174P,TC74AC174F,TC74AC174FN,TC74AC174FT

Hex D-Type Flip Flop with Clear

Note: xxxFN (JEDEC SOP) is not available in

Japan.

The TC74AC174 is an advanced high speed CMOS HEX

D-TYPE FLIP FLOP fabricated with silicon gate and

TC74AC174P

double-layer metal wiring C²MOS technology.

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

Information signals applied to D inputs are transferred to the

Q output on the positive going edge of the clock pulse.

When the CLR input is held low, the Q output are in the low

logic level independent of the other inputs.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

TC74AC174F

Features

•

High speed: f

= 180 MHz (typ.) at V

= 5 V

max

Low power dissipation: I

= 8 μA (max) at Ta = 25°C

High noise immunity: V

= V

= 28% V

(min)

NIH

NIL

Symmetrical output impedance: |I | = I

= 24 mA (min)

Capability of driving 50 Ω

transmission lines.

TC74AC174FN

∼

−

pHL

•

Balanced propagation delays: t

pLH

Wide operating voltage range: V

= 2 to 5.5 V

CC (opr)

Pin and function compatible with 74F174

TC74AC174FT

Weight

DIP16-P-300-2.54A

SOP16-P-300-1.27A

SOL16-P-150-1.27

TSSOP16-P-0044-0.65A

: 1.00 g (typ.)

: 0.18 g (typ.)

: 0.13 g (typ.)

: 0.06 g (typ.)

2007-10-01

12 3 4 5 6 7...10

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