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TC551001BFL-70L PDF预览

TC551001BFL-70L

更新时间: 2024-10-31 22:49:55
品牌 Logo 应用领域
东芝 - TOSHIBA
页数 文件大小 规格书
13页 586K
描述
SILICON GATE CMOS 131,072 WORD x 8 BIT STATIC RAM

TC551001BFL-70L 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.525 INCH, 1.27 MM PITCH, PLASTIC, SOP-32
针数:32Reach Compliance Code:unknown
风险等级:5.78最长访问时间:70 ns
JESD-30 代码:R-PDSO-G32JESD-609代码:e0
长度:20.6 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:2.8 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10.7 mm

TC551001BFL-70L 数据手册

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TOSHIBA  
TC551001BPL/BFL/BFTL/BTRL-70L/85L  
SILICON GATE CMOS  
131,072 WORD x 8 BIT STATIC RAM  
Description  
The TC551001BPL is a 1,048,576 bits static random access memory organized as 131,072 words by 8 bits using CMOS technology,  
and operated from a single 5V power supply. Advanced circuit techniques provide both high speed and low power features with an  
operating current of 5mA/MHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is  
placed in a low power standby mode in which the standby current is 2µA typically. The TC551001BPL has three control inputs.  
Chip Enable inputs (CE1, CE2) allow for device selection and data retention control, while an Output Enable input (OE) provides fast  
memory access. The TC551001BPL is suitable for use in microprocessor application systems where high speed, low power, and  
battery backup are required.  
The TC551001BPL is offered in a standard dual-in-line 32-pin plastic package, a small outline plastic package, and a thin small  
outline plastic package (forward, reverse type).  
Pin Connection (Top View)  
Features  
• Low power dissipation:  
• Standby current:  
• 5V single power supply  
• Access time (max.)  
27.5mW/MHz (typ.)  
4µA (max.) at Ta = 25°C  
TC551001BPL/BFL/BFTL/BTRL  
-70L  
-85L  
Access Time  
70ns  
70ns  
70ns  
35ns  
85ns  
85ns  
85ns  
45ns  
CE1 Access Time  
CE2 Access Time  
OE Access Time  
• Power down feature:  
CE1, CE2  
• Data retention supply voltage:  
2.0 ~ 5.5V  
• Inputs and outputs directly TTL compatible  
• Package  
TC551001BPL  
: DIP32-P-600  
TC551001BFL  
TC551001BFTL  
: SOP32-P-525  
: TSOP32-P-0820  
TC551001BTRL : TSOP32-P-0820A  
Pin Names  
A0 ~ A16  
R/W  
Address Inputs  
Read/Write Control Input  
Output Enable Input  
OE  
CE1, CE2 Chip Enable Inputs  
I/O1 ~ I/O8 Data Input/Output  
V
Power (+5V)  
Ground  
DD  
GND  
N.C.  
No Connection  
TSOP Pinout  
PIN NO.  
PIN NAME  
PIN NO.  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
A
A
A
A
R/W CE2  
21 22  
I/O1 I/O2  
A
V
NC  
25  
A
A
A
A
A
A
A
4
11  
9
8
13  
15  
DD  
16  
14  
12  
7
6
5
17  
18  
19  
20  
23  
24  
26  
27  
28  
29  
30  
31  
32  
PIN NAME  
A
A
A
A
I/O3 GND I/O4  
I/O5  
I/O6  
I/O7  
I/O8  
CE1  
A
10  
OE  
3
2
1
0
TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.  
1

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