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T2802-PLQG PDF预览

T2802-PLQG

更新时间: 2024-11-21 19:56:35
品牌 Logo 应用领域
爱特美尔 - ATMEL 电信电信集成电路
页数 文件大小 规格书
29页 550K
描述
RF and Baseband Circuit, 7 X 7 MM, QFN-48

T2802-PLQG 技术参数

生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN,针数:48
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84JESD-30 代码:S-XQCC-N48
JESD-609代码:e0长度:7 mm
功能数量:1端子数量:48
最高工作温度:85 °C最低工作温度:-25 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):240认证状态:Not Qualified
座面最大高度:1 mm标称供电电压:3 V
表面贴装:YES电信集成电路类型:RF AND BASEBAND CIRCUIT
温度等级:OTHER端子面层:TIN LEAD
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:7 mmBase Number Matches:1

T2802-PLQG 数据手册

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Features  
Fully Integrated TX/RX with VCO  
Fast Settling Synthesizer  
Unlimited Multi-slot Operation with Advanced Closed-loop Modulation  
No Mechanical Tuning Required  
Low Current Consumption  
Auxiliary Voltage Regulator On-chip (3.2 V to 4.6 V)  
Supply-voltage Range 3 V to 4.6 V (Regulated)  
Ramp-signal Generator for Power Ramping and Power Control of External SiGe Power  
Amplifier (T7024 and T7026)  
Supports Multiple Reference Clocks (10.368 MHz/13.824 MHz/20.736 MHz/27.648 MHz)  
TX Preamplifier with 3 dBm Output Power at 2.45 GHz  
Few Low-cost External Components  
2.4 GHz  
WDECT/ISM  
Single-chip  
Transceiver  
Electrostatic sensitive device.  
Observe precautions for handling.  
Description  
T2802  
The T2802 is an RF IC for low-power applications in the 2.45 GHz ISM band. The  
QFN48-packaged IC is a complete transceiver including image rejection mixer, IF  
amplifier, FM demodulator, baseband filter, RSSI, TX preamplifier, power-ramping  
generator for power amplifiers, integrated synthesizer, fully integrated VCO, TX filter  
and modulation compensation circuit for advanced closed-loop modulation concept.  
No mechanical tuning is necessary in production.  
Preliminary  
Figure 1. Block Diagram  
DEMOD  
TANK  
MIXER  
OUT  
IF_TANK  
IF AMP 1  
CF  
IF_IN  
IF AMP 2  
IR MIXER  
BB_OUT  
RSSI  
RF_IN  
DEMOD  
BB FILTER  
RAMP_OUT  
D/A  
RAMP  
GEN  
RAMP  
D/A  
DEMOD DAC  
RSSI  
RAMP_SET  
GF  
VCO  
TX/RX  
SWITCH  
TX_DATA  
CLOCK  
3-WIRE  
PC  
PD  
MCC  
RC  
DATA  
ENABLE  
f
BUS  
TX_OUT  
PU_VCO  
: n  
TX DRIVER  
RX_ON  
CTRL  
TX_ON  
CP  
LOGIC  
PU_RX/TX  
PU_PLL  
AUX  
REG  
VCO  
REG  
f
: n  
VREG_VCO  
VS_VCO  
VREG  
VS_REG VTUNE  
CP  
LD  
REF_CLK  
GND_VCO  
PU_REG REG_CTRL  
I_CPSW  
Rev. 4509F–DECT–10/03  

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