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T15M1024A-100PI PDF预览

T15M1024A-100PI

更新时间: 2024-11-07 22:20:43
品牌 Logo 应用领域
TMT /
页数 文件大小 规格书
13页 87K
描述
128K X 8 LOW POWER CMOS STATIC RAM

T15M1024A-100PI 技术参数

生命周期:Contact Manufacturer包装说明:TSOP1, TSSOP32,.56,20
Reach Compliance Code:unknown风险等级:5.8
Is Samacsys:NBase Number Matches:1

T15M1024A-100PI 数据手册

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TE  
tmCH  
T15M1024A  
128K X 8 LOW POWER  
CMOS STATIC RAM  
SRAM  
FEATURES  
GENERAL DESCRIPTION  
Low-power consumption  
- Active: 40mA at 55ns  
- Stand-by: (CMOS input/output)  
0 ~ +70 °C = 15uA  
The T15M1024A is a very Low Power CMOS  
Static RAM organized as 131,072 words by 8 bits.  
That operates on a wide voltage range from +5V  
(±10%) power supply, Fabricated using high  
performance CMOS technology, Inputs and  
three-state outputs are TTL compatible and allow  
for direct interfacing with common system bus  
structures. Data retention is guaranteed at a power  
supply voltage as low as 1.5V.  
-40 ~ +85 °C = 20uA  
55/70/100 ns access time  
Equal access and cycle time  
Single +5V (±10%) Power Supply  
TTL compatible , Tri-state output  
Common I/O capability  
Automatic power-down when deselected  
Available in 32-pin SOP ,TSOP-I(8x20mm),  
TSOP-I(8x13.4mm) and DIP (600 mil) package.  
BLOCK DIAGRAM  
Vcc  
Vss  
A0  
PART NUMBER EXAMPLES  
CORE  
ARRAY  
PACKAGE  
CODE  
Operating  
Temperature  
PART NO.  
DECODER  
.
.
.
T15M1024A-55D  
T15M1024A-70H  
T15M1024A-100P  
T15M1024A-100N  
T15M1024A-55DI  
T15M1024A-70HI  
T15M1024A-100PI  
T15M1024A-100NI  
D=SOP  
H=TSOP-I(8x20)  
P=TSOP-I(8x13.4)  
N=DIP (600 mil)  
D=SOP  
A16  
0 ~ +70 °C  
WE  
OE  
CE1  
CE2  
I/O1  
CONTROL  
CIRCUIT  
.
DATA I/O  
.
.
H=TSOP-I(8x20)  
P=TSOP-I(8x13.4)  
N=DIP (600 mil)  
-40 ~ +85 °C  
I/O8  
TM Technology Inc. reserves the right  
to change products or specifications without notice.  
P. 1  
Publication Date: FEB. 2002  
Revision:A  

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