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SY10EL57ZCTR PDF预览

SY10EL57ZCTR

更新时间: 2024-11-02 20:21:35
品牌 Logo 应用领域
美国微芯 - MICROCHIP 光电二极管逻辑集成电路
页数 文件大小 规格书
5页 52K
描述
Multiplexer, 10EL Series, 1-Func, 4 Line Input, 1 Line Output, Complementary Output, ECL, PDSO16

SY10EL57ZCTR 技术参数

生命周期:Not Recommended零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.25Is Samacsys:N
其他特性:4:1 OR 2:1 MULTIPLEXER系列:10EL
JESD-30 代码:R-PDSO-G16长度:9.93 mm
逻辑集成电路类型:MULTIPLEXER功能数量:1
输入次数:4输出次数:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):0.69 ns座面最大高度:1.73 mm
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:3.94 mmBase Number Matches:1

SY10EL57ZCTR 数据手册

 浏览型号SY10EL57ZCTR的Datasheet PDF文件第2页浏览型号SY10EL57ZCTR的Datasheet PDF文件第3页浏览型号SY10EL57ZCTR的Datasheet PDF文件第4页浏览型号SY10EL57ZCTR的Datasheet PDF文件第5页 
7  
SY10EL577  
SY100EL57  
4:1 DIFFERENTIAL  
MULTIPLEXER  
FEATURES  
DESCRIPTION  
5V power supply  
The SY10/100EL57 are fully differential 4:1 multiplexers.  
By leaving the SEL1 line open (pulled LOW via the input  
pulldown resistors) the device can also be used as a  
differential 2:1 multiplexer with SEL0 input selecting between  
D0 and D1. The fully differential architecture of the EL57  
makes it ideal for use in low skew applications such as  
clock distribution.  
Useful as either 4:1 or 2:1 multiplexer  
VBB output for single-ended operation  
75Kinternal input pulldown resistors  
Available in 150 mil 16-pin SOIC package  
The SEL1 is the most significant select line. The binary  
number applied to the select inputs will select the same  
numbered data input (i.e., 00 selects D0).  
Multiple VBB outputs are provided for single-ended or  
AC coupled interfaces. In these scenarios, the VBB output  
should be connected to the data bar inputs and bypassed  
via a 0.01µF capacitor to ground. Note that the VBB output  
can source/sink up to 0.5mA of current without upsetting  
the voltage level.  
PIN NAMES  
TRUTH TABLE  
Pin  
Function  
Differential Data Inputs  
Mux Select Inputs  
Reference Outputs  
Data Outputs  
SEL1  
SEL0  
DATA OUT  
D0-3  
SEL0, 1  
VBB1, 2  
Q
L
L
L
H
L
D0  
D1  
D2  
D3  
H
H
H
Rev.: H  
Amendment: /0  
M9999-021910  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: February 2010  

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